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> configure(npc)

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ysyx_22040000 李心杨
 Linux calcite 6.1.69 #1-NixOS SMP PREEMPT_DYNAMIC Wed Dec 20 16:00:29 UTC 2023 x86_64 GNU/Linux
  18:18:26  up 2 days 17:19,  2 users,  load average: 1.03, 0.58, 0.73
This commit is contained in:
tracer-ysyx 2024-01-10 18:18:26 +08:00 committed by xinyangli
parent d3812b75e3
commit df630abf1a
No known key found for this signature in database
2 changed files with 15 additions and 10 deletions
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18
npc/CMakeLists.txt
View file

@ -25,36 +25,36 @@ file(GLOB_RECURSE SCALA_CORE_TEST_SOURCES "${SCALA_CORE}/src/test/scala/*.scala"
# Configure time verilog source generation for verilator
execute_process(
COMMAND sbt "runMain circt.stage.ChiselMain --target-dir ${CMAKE_CURRENT_BINARY_DIR}/vsrc --module ${CHISEL_MODULE_CLASS} --target verilog"
COMMAND sbt "runMain circt.stage.ChiselMain --target-dir ${CMAKE_CURRENT_BINARY_DIR}/${TOPMODULE}/vsrc --module ${CHISEL_MODULE_CLASS} --target verilog"
WORKING_DIRECTORY ${SCALA_CORE}
)
add_custom_command(
OUTPUT ${CMAKE_CURRENT_BINARY_DIR}/vsrc/${TOPMODULE}.v
COMMAND sbt "runMain circt.stage.ChiselMain --target-dir ${CMAKE_CURRENT_BINARY_DIR}/vsrc --module ${CHISEL_MODULE_CLASS} --target verilog"
OUTPUT ${CMAKE_CURRENT_BINARY_DIR}/${TOPMODULE}/vsrc/${TOPMODULE}.v
COMMAND sbt "runMain circt.stage.ChiselMain --target-dir ${CMAKE_CURRENT_BINARY_DIR}/${TOPMODULE}/vsrc --module ${CHISEL_MODULE_CLASS} --target verilog"
WORKING_DIRECTORY ${SCALA_CORE}
DEPENDS ${SCALA_CORE_SOURCES}
)
add_custom_target(
ChiselBuild
DEPENDS ${CMAKE_CURRENT_BINARY_DIR}/vsrc/${TOPMODULE}.v
DEPENDS ${CMAKE_CURRENT_BINARY_DIR}/${TOPMODULE}/vsrc/${TOPMODULE}.v
)
# -- Build NVBoard executable
add_custom_command(
OUTPUT ${CMAKE_CURRENT_BINARY_DIR}/auto_bind.cpp
COMMAND auto_pin_bind ${CMAKE_SOURCE_DIR}/constr/${TOPMODULE}.nxdc ${CMAKE_CURRENT_BINARY_DIR}/auto_bind.cpp
OUTPUT ${CMAKE_CURRENT_BINARY_DIR}/${TOPMODULE}/auto_bind.cpp
COMMAND auto_pin_bind ${CMAKE_SOURCE_DIR}/constr/${TOPMODULE}.nxdc ${CMAKE_CURRENT_BINARY_DIR}/${TOPMODULE}/auto_bind.cpp
DEPENDS ${CMAKE_SOURCE_DIR}/constr/${TOPMODULE}.nxdc
)
add_executable(V${TOPMODULE}_nvboard csrc_nvboard/${TOPMODULE}/main.cpp auto_bind.cpp)
add_executable(V${TOPMODULE}_nvboard csrc_nvboard/${TOPMODULE}/main.cpp ${CMAKE_CURRENT_BINARY_DIR}/${TOPMODULE}/auto_bind.cpp)
verilate(V${TOPMODULE}_nvboard TRACE COVERAGE THREADS
TOP_MODULE ${TOPMODULE}
PREFIX V${TOPMODULE}
SOURCES ${CMAKE_CURRENT_BINARY_DIR}/vsrc/${TOPMODULE}.v)
SOURCES ${CMAKE_CURRENT_BINARY_DIR}/${TOPMODULE}/vsrc/${TOPMODULE}.v)
add_dependencies(V${TOPMODULE}_nvboard ChiselBuild)
target_include_directories(V${TOPMODULE}_nvboard PRIVATE ${NVBOARD_INCLUDE_DIR} ${SDL2_INCLUDE_DIRS})
@ -69,7 +69,7 @@ add_executable(V${TOPMODULE} csrc/main.cpp)
verilate(V${TOPMODULE} TRACE COVERAGE THREADS
TOP_MODULE ${TOPMODULE}
PREFIX V${TOPMODULE}
SOURCES ${CMAKE_CURRENT_BINARY_DIR}/vsrc/${TOPMODULE}.v)
SOURCES ${CMAKE_CURRENT_BINARY_DIR}/${TOPMODULE}/vsrc/${TOPMODULE}.v)
add_dependencies(V${TOPMODULE} ChiselBuild)

7
npc/csrc_nvboard/SegHandler/main.cpp
View file

@ -1,4 +1,3 @@
#include <VSegHandler.h>
#include <cassert>
#include <cstdlib>
#include <nvboard.h>
@ -9,6 +8,12 @@
#define VERILATOR_TOPMODULE VSegHandler
#endif
#define CLASS_SYSTEM_HEADER_NAME(name) CLASS_SYSTEM_HEADER_NAME_IMPL(name)
#define CLASS_SYSTEM_HEADER_NAME_IMPL(name) <name.h>
#include CLASS_SYSTEM_HEADER_NAME(VERILATOR_TOPMODULE)
#undef CLASS_SYSTEM_HEADER_NAME
#undef CLASS_SYSTEM_HEADER_NAME_IMPL
const int MAX_SIM_TIME = 100;
int keycode = 0;