From df630abf1a5147aa723e569cda27ad7dba2a59cf Mon Sep 17 00:00:00 2001 From: tracer-ysyx Date: Wed, 10 Jan 2024 18:18:26 +0800 Subject: [PATCH] =?UTF-8?q?>=20configure(npc)=20=20ysyx=5F22040000=20?= =?UTF-8?q?=E6=9D=8E=E5=BF=83=E6=9D=A8=20=20Linux=20calcite=206.1.69=20#1-?= =?UTF-8?q?NixOS=20SMP=20PREEMPT=5FDYNAMIC=20Wed=20Dec=2020=2016:00:29=20U?= =?UTF-8?q?TC=202023=20x86=5F64=20GNU/Linux=20=20=2018:18:26=20=20up=202?= =?UTF-8?q?=20days=2017:19,=20=202=20users,=20=20load=20average:=201.03,?= =?UTF-8?q?=200.58,=200.73?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- npc/CMakeLists.txt | 18 +++++++++--------- npc/csrc_nvboard/SegHandler/main.cpp | 7 ++++++- 2 files changed, 15 insertions(+), 10 deletions(-) diff --git a/npc/CMakeLists.txt b/npc/CMakeLists.txt index 9e27367..71a2aaa 100644 --- a/npc/CMakeLists.txt +++ b/npc/CMakeLists.txt @@ -25,36 +25,36 @@ file(GLOB_RECURSE SCALA_CORE_TEST_SOURCES "${SCALA_CORE}/src/test/scala/*.scala" # Configure time verilog source generation for verilator execute_process( - COMMAND sbt "runMain circt.stage.ChiselMain --target-dir ${CMAKE_CURRENT_BINARY_DIR}/vsrc --module ${CHISEL_MODULE_CLASS} --target verilog" + COMMAND sbt "runMain circt.stage.ChiselMain --target-dir ${CMAKE_CURRENT_BINARY_DIR}/${TOPMODULE}/vsrc --module ${CHISEL_MODULE_CLASS} --target verilog" WORKING_DIRECTORY ${SCALA_CORE} ) add_custom_command( - OUTPUT ${CMAKE_CURRENT_BINARY_DIR}/vsrc/${TOPMODULE}.v - COMMAND sbt "runMain circt.stage.ChiselMain --target-dir ${CMAKE_CURRENT_BINARY_DIR}/vsrc --module ${CHISEL_MODULE_CLASS} --target verilog" + OUTPUT ${CMAKE_CURRENT_BINARY_DIR}/${TOPMODULE}/vsrc/${TOPMODULE}.v + COMMAND sbt "runMain circt.stage.ChiselMain --target-dir ${CMAKE_CURRENT_BINARY_DIR}/${TOPMODULE}/vsrc --module ${CHISEL_MODULE_CLASS} --target verilog" WORKING_DIRECTORY ${SCALA_CORE} DEPENDS ${SCALA_CORE_SOURCES} ) add_custom_target( ChiselBuild - DEPENDS ${CMAKE_CURRENT_BINARY_DIR}/vsrc/${TOPMODULE}.v + DEPENDS ${CMAKE_CURRENT_BINARY_DIR}/${TOPMODULE}/vsrc/${TOPMODULE}.v ) # -- Build NVBoard executable add_custom_command( - OUTPUT ${CMAKE_CURRENT_BINARY_DIR}/auto_bind.cpp - COMMAND auto_pin_bind ${CMAKE_SOURCE_DIR}/constr/${TOPMODULE}.nxdc ${CMAKE_CURRENT_BINARY_DIR}/auto_bind.cpp + OUTPUT ${CMAKE_CURRENT_BINARY_DIR}/${TOPMODULE}/auto_bind.cpp + COMMAND auto_pin_bind ${CMAKE_SOURCE_DIR}/constr/${TOPMODULE}.nxdc ${CMAKE_CURRENT_BINARY_DIR}/${TOPMODULE}/auto_bind.cpp DEPENDS ${CMAKE_SOURCE_DIR}/constr/${TOPMODULE}.nxdc ) -add_executable(V${TOPMODULE}_nvboard csrc_nvboard/${TOPMODULE}/main.cpp auto_bind.cpp) +add_executable(V${TOPMODULE}_nvboard csrc_nvboard/${TOPMODULE}/main.cpp ${CMAKE_CURRENT_BINARY_DIR}/${TOPMODULE}/auto_bind.cpp) verilate(V${TOPMODULE}_nvboard TRACE COVERAGE THREADS TOP_MODULE ${TOPMODULE} PREFIX V${TOPMODULE} - SOURCES ${CMAKE_CURRENT_BINARY_DIR}/vsrc/${TOPMODULE}.v) + SOURCES ${CMAKE_CURRENT_BINARY_DIR}/${TOPMODULE}/vsrc/${TOPMODULE}.v) add_dependencies(V${TOPMODULE}_nvboard ChiselBuild) target_include_directories(V${TOPMODULE}_nvboard PRIVATE ${NVBOARD_INCLUDE_DIR} ${SDL2_INCLUDE_DIRS}) @@ -69,7 +69,7 @@ add_executable(V${TOPMODULE} csrc/main.cpp) verilate(V${TOPMODULE} TRACE COVERAGE THREADS TOP_MODULE ${TOPMODULE} PREFIX V${TOPMODULE} - SOURCES ${CMAKE_CURRENT_BINARY_DIR}/vsrc/${TOPMODULE}.v) + SOURCES ${CMAKE_CURRENT_BINARY_DIR}/${TOPMODULE}/vsrc/${TOPMODULE}.v) add_dependencies(V${TOPMODULE} ChiselBuild) diff --git a/npc/csrc_nvboard/SegHandler/main.cpp b/npc/csrc_nvboard/SegHandler/main.cpp index 7ee423c..631d072 100644 --- a/npc/csrc_nvboard/SegHandler/main.cpp +++ b/npc/csrc_nvboard/SegHandler/main.cpp @@ -1,4 +1,3 @@ -#include #include #include #include @@ -9,6 +8,12 @@ #define VERILATOR_TOPMODULE VSegHandler #endif +#define CLASS_SYSTEM_HEADER_NAME(name) CLASS_SYSTEM_HEADER_NAME_IMPL(name) +#define CLASS_SYSTEM_HEADER_NAME_IMPL(name) +#include CLASS_SYSTEM_HEADER_NAME(VERILATOR_TOPMODULE) +#undef CLASS_SYSTEM_HEADER_NAME +#undef CLASS_SYSTEM_HEADER_NAME_IMPL + const int MAX_SIM_TIME = 100; int keycode = 0;