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> configure(npc)

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ysyx_22040000 李心杨
 Linux calcite 6.1.69 #1-NixOS SMP PREEMPT_DYNAMIC Wed Dec 20 16:00:29 UTC 2023 x86_64 GNU/Linux
  14:54:44  up 2 days 13:55,  2 users,  load average: 1.87, 1.83, 1.54
This commit is contained in:
tracer-ysyx 2024-01-10 14:54:44 +08:00 committed by xinyangli
parent abb76552fb
commit f17cfd7946
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4 changed files with 8 additions and 23 deletions
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2
npc/CMakeLists.txt
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@ -17,7 +17,7 @@ find_package(verilator REQUIRED)
find_library(NVBOARD_LIBRARY NAMES nvboard)
find_path(NVBOARD_INCLUDE_DIR NAMES nvboard.h)
set(TOPMODULE "Keyboard")
set(TOPMODULE "keyboard.SegHandler")
set(SCALA_CORE "${CMAKE_CURRENT_SOURCE_DIR}/core")
set(CHISEL_MODULE_CLASS "${CMAKE_PROJECT_NAME}.${TOPMODULE}")
file(GLOB_RECURSE SCALA_CORE_SOURCES "${SCALA_CORE}/src/main/scala/*.scala")

21
npc/core/src/main/scala/Keyboard.scala
View file

@ -57,7 +57,7 @@ class KeyboardController extends Module {
}
}
class SegHandler(seg_count: Int) extends Module {
class SegGenerator(seg_count: Int) extends Module {
val io = IO(new Bundle {
val keycode = Flipped(Decoupled(UInt(8.W)))
val segs = Output(Vec(seg_count, UInt(8.W)))
@ -89,26 +89,9 @@ class SegHandler(seg_count: Int) extends Module {
val keycode_digits = VecInit(io.keycode.bits(3,0)) ++ VecInit(io.keycode.bits(7,4))
val keycode_seg = keycode_digits.map(MuxLookup(_, 0.U)(digit_to_seg))
seg_regs := keycode_seg ++ keycode_seg ++ keycode_seg
seg_regs := keycode_seg ++ keycode_seg ++ keycode_seg ++ keycode_seg
io.segs := seg_regs
// when(io.keycode.valid) {
// val data = io.keycode.bits
// val state_f0_received = RegNext(data === 0xF0.U, false.B)
// io.keycode.ready := true.B
// // Handle keycode based on current state
// // (keyboard press counter) :: (ASCII code) :: (Keycode)
// when(state_f0_received) {
// // Release code
// }.otherwise{
// counter.inc()
// last_keycode := io.keycode.bits
// }
// }.otherwise {
// io.keycode.ready := false.B
// }
}

6
npc/core/src/main/scala/Main.scala
View file

@ -88,11 +88,13 @@ class Keyboard extends Module {
val segs = Output(Vec(3, UInt(8.W)))
})
val seg_handler = Module(new SegHandler(6))
val seg_handler = Module(new SegHandler)
val keyboard_controller = Module(new KeyboardController)
seg_handler.io.keycode <> keyboard_controller.io.out
keyboard_controller.io.ps2 := io.ps2
io.segs := seg_handler.io.segs
}
}
class SegHandler extends SegGenerator(8) { }

2
npc/core/src/test/scala/Keyboard.scala
View file

@ -66,7 +66,7 @@ class KeyboardControllerSpec extends AnyFreeSpec with ChiselScalatestTester {
class SegSpec extends AnyFreeSpec with ChiselScalatestTester {
"try out vec" in {
test(new SegHandler(6)) {c =>
test(new SegHandler) {c =>
c.io.keycode.bits.poke(0xAC)
c.clock.step(1)
println(s"out: ${c.io.segs(0).peek().litValue}")