ysyx-workbench/npc/obj/Vexample___024root__DepSet_h625e39dc__0__Slow.cpp
tracer-ysyx df992995ca > sim RTL
ysyx_22040000 李心杨
Linux calcite 6.1.65 #1-NixOS SMP PREEMPT_DYNAMIC Sun Dec  3 06:32:13 UTC 2023 x86_64 GNU/Linux
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2023-12-23 18:31:48 +08:00

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C++

// Verilated -*- C++ -*-
// DESCRIPTION: Verilator output: Design implementation internals
// See Vexample.h for the primary calling header
#include "Vexample__pch.h"
#include "Vexample__Syms.h"
#include "Vexample___024root.h"
#ifdef VL_DEBUG
VL_ATTR_COLD void Vexample___024root___dump_triggers__stl(Vexample___024root* vlSelf);
#endif // VL_DEBUG
VL_ATTR_COLD void Vexample___024root___eval_triggers__stl(Vexample___024root* vlSelf) {
if (false && vlSelf) {} // Prevent unused
Vexample__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
VL_DEBUG_IF(VL_DBG_MSGF("+ Vexample___024root___eval_triggers__stl\n"); );
// Body
vlSelf->__VstlTriggered.set(0U, (IData)(vlSelf->__VstlFirstIteration));
#ifdef VL_DEBUG
if (VL_UNLIKELY(vlSymsp->_vm_contextp__->debug())) {
Vexample___024root___dump_triggers__stl(vlSelf);
}
#endif
}