ysyx-workbench/npc/obj/Vexample___024root__DepSet_h625e39dc__0.cpp
tracer-ysyx a315f9ac2b > sim RTL
ysyx_22040000 李心杨
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// Verilated -*- C++ -*-
// DESCRIPTION: Verilator output: Design implementation internals
// See Vexample.h for the primary calling header
#include "Vexample__pch.h"
#include "Vexample__Syms.h"
#include "Vexample___024root.h"
#ifdef VL_DEBUG
VL_ATTR_COLD void Vexample___024root___dump_triggers__act(Vexample___024root* vlSelf);
#endif // VL_DEBUG
void Vexample___024root___eval_triggers__act(Vexample___024root* vlSelf) {
if (false && vlSelf) {} // Prevent unused
Vexample__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
VL_DEBUG_IF(VL_DBG_MSGF("+ Vexample___024root___eval_triggers__act\n"); );
// Body
#ifdef VL_DEBUG
if (VL_UNLIKELY(vlSymsp->_vm_contextp__->debug())) {
Vexample___024root___dump_triggers__act(vlSelf);
}
#endif
}