ysyx-workbench/npc/csrc/Flow/main.cpp
tracer-ysyx a7be72f328 > build_flow_VFlow
ysyx_22040000 李心杨
 Linux calcite 6.6.19 #1-NixOS SMP PREEMPT_DYNAMIC Fri Mar  1 12:35:11 UTC 2024 x86_64 GNU/Linux
  11:57:45  up   1:33,  2 users,  load average: 0.89, 0.78, 0.86
2024-03-13 11:57:45 +08:00

42 lines
973 B
C++

#include <cstdlib>
#include <cassert>
#include <cstdlib>
#include <verilated.h>
#include <verilated_vcd_c.h>
#include <VFlow.h>
#define MAX_SIM_TIME 100
#define VERILATOR_TRACE
int main(int argc, char **argv, char **env) {
int sim_time = 0;
Verilated::commandArgs(argc, argv);
VFlow *top = new VFlow;
Verilated::traceEverOn(true);
VerilatedVcdC *m_trace = new VerilatedVcdC;
#ifdef VERILATOR_TRACE
top->trace(m_trace, 5);
m_trace->open("waveform.vcd");
#endif
for (sim_time = 0; sim_time < 10; sim_time++) {
top->eval();
top->clock = !top->clock;
top->reset = 1;
#ifdef VERILATOR_TRACE
m_trace->dump(sim_time);
#endif
}
for (sim_time = 10; sim_time < MAX_SIM_TIME; sim_time++) {
top->eval();
top->clock = !top->clock;
#ifdef VERILATOR_TRACE
m_trace->dump(sim_time);
#endif
}
#ifdef VERILATOR_TRACE
m_trace->close();
#endif
delete top;
exit(EXIT_SUCCESS);
}