xinyangli
f02d5eb2f1
- Put add_custom_command into seperate ChiselBuild module. Otherwise final target cannot correctly depends on scala sources.
83 lines
2.6 KiB
CMake
83 lines
2.6 KiB
CMake
cmake_minimum_required(VERSION 3.26)
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project(flow)
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set (CMAKE_CXX_STANDARD 17)
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cmake_policy(SET CMP0144 NEW)
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include(CMakeDependentOption)
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include(CTest)
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enable_testing()
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list(APPEND CMAKE_MODULE_PATH ${PROJECT_SOURCE_DIR}/cmake)
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# -- Build options
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option(BUILD_USE_BLOOP "Whether to use bloop to speed up elaborate" ON)
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option(BUILD_SIM_TARGET "Whether to build verilator simulation binary" ON)
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cmake_dependent_option(BUILD_SIM_NVBOARD_TARGET "Whether to build nvboard target" OFF "BUILD_SIM_TARGET" OFF)
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option(ENABLE_YSYX_GIT_TRACKER "Ysyx tracker support" OFF)
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set(TOPMODULE "Flow" CACHE STRING "Topmodule name in chisel")
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# -- Ysyx tracker, configure
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if(ENABLE_YSYX_GIT_TRACKER)
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execute_process(
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COMMAND ${CMAKE_SOURCE_DIR}/../git_commit.sh "configure(npc)"
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WORKING_DIRECTORY ${CMAKE_SOURCE_DIR}/..
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)
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endif()
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# -- Check dependencies
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if(BUILD_SIM_TARGET)
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find_package(verilator REQUIRED)
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endif()
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if(BUILD_SIM_NVBOARD_TARGET)
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find_package(SDL2 REQUIRED)
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find_package(SDL2_image REQUIRED)
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endif()
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find_package(CLI11 CONFIG REQUIRED)
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find_library(NVBOARD_LIBRARY NAMES nvboard)
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find_path(NVBOARD_INCLUDE_DIR NAMES nvboard.h)
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# FIXME: all scala source file are tracked here, cause all files to rebuild
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# after a source update.
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set(SCALA_CORE "${CMAKE_CURRENT_SOURCE_DIR}/core")
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set(CHISEL_MODULE_CLASS "${CMAKE_PROJECT_NAME}.${TOPMODULE}")
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# Verilog files are generted in CHISEL_OUTPUT_TMP_DIR and copy to
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# CHISEL_OUTPUT_DIR if content changes
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set(CHISEL_OUTPUT_DIR ${CMAKE_CURRENT_BINARY_DIR}/${TOPMODULE}/vsrc)
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set(CHISEL_OUTPUT_TMP_DIR ${CMAKE_CURRENT_BINARY_DIR}/${TOPMODULE}/vsrc_tmp)
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set(CHISEL_OUTPUT_VERILATOR_CONF ${CHISEL_OUTPUT_DIR}/conf.vlt)
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set(CHISEL_OUTPUT_TOPMODULE ${CHISEL_OUTPUT_DIR}/${TOPMODULE}.sv)
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set(CHISEL_EMIT_ARGS "--target-dir ${CHISEL_OUTPUT_TMP_DIR}")
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# -- Build NVBoard executable
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if(BUILD_SIM_NVBOARD_TARGET)
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add_subdirectory(csrc_nvboard)
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endif()
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# -- Build Verilator executable and add to test
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include_directories(include)
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add_subdirectory(csrc)
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add_test(
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NAME V${TOPMODULE}
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COMMAND V${TOPMODULE}
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--no-bin -m ${PROJECT_SOURCE_DIR}/resource/addi.txt
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--diff-lib /home/xin/repo/ysyx-workbench/nemu/build/riscv32-nemu-interpreter-so)
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# -- Add build tracking
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if(ENABLE_YSYX_GIT_TRACKER)
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add_custom_command(
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TARGET V${TOPMODULE}_nvboard PRE_BUILD
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COMMAND ${CMAKE_SOURCE_DIR}/../git_commit.sh "build_${CMAKE_PROJECT_NAME}_V${TOPMODULE}_nvboard"
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WORKING_DIRECTORY ${CMAKE_SOURCE_DIR}/..
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)
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add_custom_command(
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TARGET V${TOPMODULE} PRE_BUILD
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COMMAND ${CMAKE_SOURCE_DIR}/../git_commit.sh "build_${CMAKE_PROJECT_NAME}_V${TOPMODULE}"
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WORKING_DIRECTORY ${CMAKE_SOURCE_DIR}/..
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)
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endif()
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