125 lines
3.8 KiB
C++
125 lines
3.8 KiB
C++
/***************************************************************************************
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* Copyright (c) 2014-2022 Zihao Yu, Nanjing University
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*
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* NEMU is licensed under Mulan PSL v2.
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* You can use this software according to the terms and conditions of the Mulan PSL v2.
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* You may obtain a copy of Mulan PSL v2 at:
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* http://license.coscl.org.cn/MulanPSL2
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*
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* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
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* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
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* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
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*
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* See the Mulan PSL v2 for more details.
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***************************************************************************************/
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#include "../../include/common.h"
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#include "mmu.h"
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#include "sim.h"
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#include <difftest-def.h>
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#define NR_GPR MUXDEF(CONFIG_RVE, 16, 32)
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static std::vector<std::pair<reg_t, abstract_device_t *>>
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difftest_plugin_devices;
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static std::vector<std::string> difftest_htif_args;
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static std::vector<std::pair<reg_t, mem_t *>>
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difftest_mem(1, std::make_pair(reg_t(DRAM_BASE), new mem_t(CONFIG_MSIZE)));
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static debug_module_config_t difftest_dm_config = {
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.progbufsize = 2,
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.max_sba_data_width = 0,
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.require_authentication = false,
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.abstract_rti = 0,
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.support_hasel = true,
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.support_abstract_csr_access = true,
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.support_abstract_fpr_access = true,
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.support_haltgroups = true,
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.support_impebreak = true};
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struct diff_context_t {
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word_t gpr[MUXDEF(CONFIG_RVE, 16, 32)];
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word_t pc;
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};
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static sim_t *s = NULL;
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static processor_t *p = NULL;
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static state_t *state = NULL;
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void sim_t::diff_init(int port) {
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p = get_core("0");
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state = p->get_state();
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}
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void sim_t::diff_step(uint64_t n) { step(n); }
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void sim_t::diff_get_regs(void *diff_context) {
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struct diff_context_t *ctx = (struct diff_context_t *)diff_context;
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for (int i = 0; i < NR_GPR; i++) {
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ctx->gpr[i] = state->XPR[i];
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}
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ctx->pc = state->pc;
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}
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void sim_t::diff_set_regs(void *diff_context) {
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struct diff_context_t *ctx = (struct diff_context_t *)diff_context;
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for (int i = 0; i < NR_GPR; i++) {
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state->XPR.write(i, (sword_t)ctx->gpr[i]);
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}
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state->pc = ctx->pc;
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}
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void sim_t::diff_memcpy(reg_t dest, void *src, size_t n) {
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mmu_t *mmu = p->get_mmu();
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for (size_t i = 0; i < n; i++) {
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mmu->store<uint8_t>(dest + i, *((uint8_t *)src + i));
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}
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}
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extern "C" {
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__EXPORT void difftest_memcpy(paddr_t addr, void *buf, size_t n,
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bool direction) {
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if (direction == DIFFTEST_TO_REF) {
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s->diff_memcpy(addr, buf, n);
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} else {
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assert(0);
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}
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}
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__EXPORT void difftest_regcpy(void *dut, bool direction) {
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if (direction == DIFFTEST_TO_REF) {
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s->diff_set_regs(dut);
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} else {
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s->diff_get_regs(dut);
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}
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}
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__EXPORT void difftest_exec(uint64_t n) { s->diff_step(n); }
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__EXPORT void difftest_init(int port) {
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difftest_htif_args.push_back("");
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const char *isa =
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"RV" MUXDEF(CONFIG_RV64, "64", "32") MUXDEF(CONFIG_RVE, "E", "I") "MAFDC";
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cfg_t cfg(/*default_initrd_bounds=*/std::make_pair((reg_t)0, (reg_t)0),
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/*default_bootargs=*/nullptr,
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/*default_isa=*/isa,
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/*default_priv=*/DEFAULT_PRIV,
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/*default_varch=*/DEFAULT_VARCH,
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/*default_misaligned=*/false,
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/*default_endianness*/ endianness_little,
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/*default_pmpregions=*/16,
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/*default_mem_layout=*/std::vector<mem_cfg_t>(),
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/*default_hartids=*/std::vector<size_t>(1),
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/*default_real_time_clint=*/false,
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/*default_trigger_count=*/4);
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s = new sim_t(&cfg, false, difftest_mem, difftest_plugin_devices,
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difftest_htif_args, difftest_dm_config, nullptr, false, NULL,
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false, NULL, true);
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s->diff_init(port);
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}
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__EXPORT void difftest_raise_intr(uint64_t NO) {
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trap_t t(NO);
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p->take_trap_public(t, state->pc);
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}
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}
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