/home/xin/repo/ysyx-workbench/am-kernels/tests/cpu-tests/build/switch-riscv32-nemu.elf:     file format elf32-littleriscv


Disassembly of section .text:

80000000 <_start>:
80000000:	00000413          	li	s0,0
80000004:	00009117          	auipc	sp,0x9
80000008:	ffc10113          	add	sp,sp,-4 # 80009000 <_end>
8000000c:	0c4000ef          	jal	800000d0 <_trm_init>

80000010 <check>:
80000010:	00050463          	beqz	a0,80000018 <check+0x8>
80000014:	00008067          	ret
80000018:	ff010113          	add	sp,sp,-16
8000001c:	00100513          	li	a0,1
80000020:	00112623          	sw	ra,12(sp)
80000024:	0a0000ef          	jal	800000c4 <halt>

80000028 <main>:
80000028:	fe010113          	add	sp,sp,-32
8000002c:	00812c23          	sw	s0,24(sp)
80000030:	00912a23          	sw	s1,20(sp)
80000034:	01212823          	sw	s2,16(sp)
80000038:	01312623          	sw	s3,12(sp)
8000003c:	01412423          	sw	s4,8(sp)
80000040:	00112e23          	sw	ra,28(sp)
80000044:	00000417          	auipc	s0,0x0
80000048:	0e440413          	add	s0,s0,228 # 80000128 <ans>
8000004c:	00000917          	auipc	s2,0x0
80000050:	0a090913          	add	s2,s2,160 # 800000ec <_trm_init+0x1c>
80000054:	00000997          	auipc	s3,0x0
80000058:	11098993          	add	s3,s3,272 # 80000164 <_bss_start>
8000005c:	fff00493          	li	s1,-1
80000060:	fff00793          	li	a5,-1
80000064:	00c00a13          	li	s4,12
80000068:	00042503          	lw	a0,0(s0)
8000006c:	00440413          	add	s0,s0,4
80000070:	00148493          	add	s1,s1,1
80000074:	40f50533          	sub	a0,a0,a5
80000078:	00153513          	seqz	a0,a0
8000007c:	f95ff0ef          	jal	80000010 <check>
80000080:	00490913          	add	s2,s2,4
80000084:	01340a63          	beq	s0,s3,80000098 <main+0x70>
80000088:	fff00793          	li	a5,-1
8000008c:	fc9a6ee3          	bltu	s4,s1,80000068 <main+0x40>
80000090:	00092783          	lw	a5,0(s2)
80000094:	fd5ff06f          	j	80000068 <main+0x40>
80000098:	00100513          	li	a0,1
8000009c:	f75ff0ef          	jal	80000010 <check>
800000a0:	01c12083          	lw	ra,28(sp)
800000a4:	01812403          	lw	s0,24(sp)
800000a8:	01412483          	lw	s1,20(sp)
800000ac:	01012903          	lw	s2,16(sp)
800000b0:	00c12983          	lw	s3,12(sp)
800000b4:	00812a03          	lw	s4,8(sp)
800000b8:	00000513          	li	a0,0
800000bc:	02010113          	add	sp,sp,32
800000c0:	00008067          	ret

800000c4 <halt>:
800000c4:	00050513          	mv	a0,a0
800000c8:	00100073          	ebreak
800000cc:	0000006f          	j	800000cc <halt+0x8>

800000d0 <_trm_init>:
800000d0:	ff010113          	add	sp,sp,-16
800000d4:	00000517          	auipc	a0,0x0
800000d8:	05050513          	add	a0,a0,80 # 80000124 <mainargs>
800000dc:	00112623          	sw	ra,12(sp)
800000e0:	f49ff0ef          	jal	80000028 <main>
800000e4:	00050513          	mv	a0,a0
800000e8:	00100073          	ebreak
800000ec:	0000006f          	j	800000ec <_trm_init+0x1c>