wrap verilated model

nemu/src/cpu/cpu-exec.c

@@ -83,7 +83,7 @@ static void execute(uint64_t n) {
     g_nr_guest_inst ++;
     trace_and_difftest(&s, cpu.pc);
     if (wp_eval_all()) { 
-      puts(logbuf[logbuf_rear]);
+      IFDEF(CONFIG_ITRACE, puts(logbuf[logbuf_rear]));
       break;
     }
     if (nemu_state.state != NEMU_RUNNING) break;
@@ -132,7 +132,7 @@ void cpu_exec(uint64_t n) {
             ANSI_FMT("HIT BAD TRAP", ANSI_FG_RED))),
           nemu_state.halt_pc);
       if(nemu_state.halt_ret != 0) {
-        log_itrace_print();
+        IFDEF(CONFIG_ITRACE, log_itrace_print());
       }
     } // fall through
     case NEMU_QUIT: statistic();

npc/CMakeLists.txt

@@ -1,7 +1,7 @@
 cmake_minimum_required(VERSION 3.26)
 
 project(flow)
-set (CMAKE_CXX_STANDARD 14)
+set (CMAKE_CXX_STANDARD 17)
 cmake_policy(SET CMP0144 NEW)
 
 include(CMakeDependentOption)

npc/csrc/Flow/main.cpp

@@ -1,7 +1,11 @@
+#include <array>
+#include <cstddef>
+#include <cstdint>
+#include <filesystem>
+#include <sys/types.h>
 #include <vpi_user.h>
 #include <VFlow.h>
 #include <cstdlib>
-#include <vector>
 #include <memory>
 #include <verilated.h>
 #include <verilated_vcd_c.h>
@@ -10,77 +14,142 @@
 #define MAX_SIM_TIME 100
 #define VERILATOR_TRACE
 
-std::vector<vpiHandle> regsHandle;
+template <class T>
-int regs[32];
+class Tracer {
-
+#ifdef VERILATOR_TRACE
-static void init_vpi_regs() {
+  std::shared_ptr<T> top;
-  std::string regfile = "TOP.Flow.reg_0.regFile_";
+  std::unique_ptr<VerilatedVcdC> m_trace;
-  for(int i = 0; i < 32; i++) {
+  uint64_t cycle = 0;
-    std::string regname = regfile + std::to_string(i);
+#endif
-    vpiHandle vh = vpi_handle_by_name((PLI_BYTE8 *)regname.c_str(), NULL);
+  public:
-    regsHandle.push_back(vh);
+    Tracer(T *top, std::filesystem::path wavefile) {
+#ifdef VERILATOR_TRACE
+      top = top;
+      Verilated::traceEverOn(true);
+      m_trace = std::make_unique<VerilatedVcdC>();
+      top->trace(m_trace.get(), 5);
+      m_trace->open(wavefile.c_str());
+#endif
     }
-}
+    ~Tracer() {
-
+#ifdef VERILATOR_TRACE
-static void init_vpi() {
+      m_trace->close();
-  init_vpi_regs();
+#endif
-}
-
-static int vpi_get_int(vpiHandle vh) {
-  s_vpi_value v;
-  v.format = vpiIntVal;
-  vpi_get_value(vh, &v);
-  return v.value.integer;
-}
-
-static void update_regs() {
-  for(int i = 0; i < 32; i++) {
-    regs[i] = vpi_get_int(regsHandle[i]);
     }
-}
     
-static void print_regs() {
+    /**
-  for(int i = 0; i < 32; i++) {
+     * Dump signals to waveform file. Must be called once after every top->eval() call.
+     */
+    void update() {
+#ifdef VERILATOR_TRACE
+      m_trace->dump(cycle++);
+#endif
+    }
+};
+template <typename T, std::size_t nr>
+class _RegistersBase {
+  std::array<T, nr> regs;
+  virtual T fetch_reg(size_t id);
+  public:
+    void update() {
+      for(int i = 0; i < regs.size(); i++) {
+        regs[i] = fetch_reg(i);
+      }
+    }
+    void print_regs() {
+      for(int i = 0; i < regs.size(); i++) {
         printf("%d: %d\t", i, regs[i]);
         if(i % 8 == 7) putchar('\n');
       }
       putchar('\n');
-}
+    }
+};
 
-static int sim_time = 0;
+template <typename T, std::size_t nr>
+class _RegistersVPI : public _RegistersBase<T, nr> {
+  std::array<vpiHandle, nr> reg_handles;
+  T fetch_reg(size_t id) {
+    s_vpi_value v;
+    v.format = vpiIntVal;
+    vpi_get_value(reg_handles[id], &v);
+    return v.value.integer;
+  }
+  public:
+    _RegistersVPI<T, nr>(const std::string regs_prefix) {
+      for(int i = 0; i < nr; i++) {
+        std::string regname = regs_prefix + std::to_string(i);
+        vpiHandle vh = vpi_handle_by_name((PLI_BYTE8 *)regname.c_str(), NULL);
+        reg_handles[i] = vh;
+      }
+    }
+};
+
+typedef _RegistersVPI<uint32_t, 32> Registers;
+
+template <typename T, std::size_t n>
+class Memory {
+  std::array<T, n> mem;
+  size_t addr_to_index(size_t addr) {
+    // Linear mapping
+    return addr - 0x80000000;
+  }
+  public:
+    const T& operator[](size_t addr) {
+      return mem[addr_to_index(index)];
+    }
+};
+
+template <typename T>
+class VlModuleInterfaceCommon : public T {
+  uint64_t sim_time = 0;
+  uint64_t posedge_cnt = 0;
+  std::unique_ptr<Tracer<T>> tracer;
+  public:
+    VlModuleInterfaceCommon<T>(bool do_trace, std::filesystem::path wavefile = "waveform.vcd") {
+      if(do_trace) tracer = std::make_unique<Tracer<T>>(this, wavefile);
+    } 
+    void eval() {
+      if(this->is_posedge()) {
+        posedge_cnt++;
+      }
+      T::clock = !T::clock;
+      sim_time++;
+      T::eval();
+      if(tracer) tracer->update();
+    }
+    void eval(int n) {
+      for(int i = 0; i < n; i++) {
+        this->eval();
+      }
+    }
+    void reset_eval(int n) {
+      this->reset = 1;
+      this->eval(n);
+      this->reset = 0;
+    }
+    bool is_posedge() {
+      // Will be posedge when eval is called
+      return T::clock == 0;
+    }
+};
+
+typedef VlModuleInterfaceCommon<VFlow> VlModule;
 
 int main(int argc, char **argv, char **env) {
-  int sim_time = 0;
-  int posedge_cnt = 0;
   Verilated::commandArgs(argc, argv);
 
-  std::unique_ptr<VFlow> top{new VFlow};
+  auto top = std::make_shared<VlModule>(false, "waveform.vcd");
-  Verilated::traceEverOn(true);
-  VerilatedVcdC *m_trace = new VerilatedVcdC;
-#ifdef VERILATOR_TRACE
-  top->trace(m_trace, 5);
-  m_trace->open("waveform.vcd");
-#endif
 
-  init_vpi();
+  Registers regs("TOP.Flow.reg_0.regFile_");
 
-  top->reset = 0;
+  top->reset_eval(10);
-  for (sim_time = 10; sim_time < MAX_SIM_TIME; sim_time++) {
+  for (int i = 0; i < MAX_SIM_TIME; i++) {
-    top->eval();
+    if(top->is_posedge()) {
-    top->clock = !top->clock;
-    if(top->clock == 1) {
       // Posedge
-      ++posedge_cnt;
+      regs.update();
-      update_regs();
+      regs.print_regs();
-      print_regs();
     }
-
+    top->eval();
-#ifdef VERILATOR_TRACE
-    m_trace->dump(sim_time);
-#endif
   }
-#ifdef VERILATOR_TRACE
+  return 0;
-  m_trace->close();
-#endif
-  exit(EXIT_SUCCESS);
 }