build: split CMakeLists
- Put add_custom_command into seperate ChiselBuild module. Otherwise final target cannot correctly depends on scala sources.
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849f2bb5f3
commit
f02d5eb2f1
6 changed files with 110 additions and 97 deletions
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@ -5,10 +5,12 @@ set (CMAKE_CXX_STANDARD 17)
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cmake_policy(SET CMP0144 NEW)
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include(CMakeDependentOption)
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include(CTest)
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enable_testing()
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list(APPEND CMAKE_MODULE_PATH ${PROJECT_SOURCE_DIR}/cmake)
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# -- Build options
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option(BUILD_USE_BLOOP "Whether to use bloop to spped up elaborate" ON)
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option(BUILD_USE_BLOOP "Whether to use bloop to speed up elaborate" ON)
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option(BUILD_SIM_TARGET "Whether to build verilator simulation binary" ON)
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cmake_dependent_option(BUILD_SIM_NVBOARD_TARGET "Whether to build nvboard target" OFF "BUILD_SIM_TARGET" OFF)
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option(ENABLE_YSYX_GIT_TRACKER "Ysyx tracker support" OFF)
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@ -42,115 +44,28 @@ set(CHISEL_MODULE_CLASS "${CMAKE_PROJECT_NAME}.${TOPMODULE}")
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# Verilog files are generted in CHISEL_OUTPUT_TMP_DIR and copy to
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# CHISEL_OUTPUT_DIR if content changes
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set(CHISEL_OUTPUT_DIR ${CMAKE_CURRENT_BINARY_DIR}/${TOPMODULE}/vsrc/)
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set(CHISEL_OUTPUT_TMP_DIR ${CMAKE_CURRENT_BINARY_DIR}/${TOPMODULE}/vsrc_tmp/)
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set(CHISEL_OUTPUT_DIR ${CMAKE_CURRENT_BINARY_DIR}/${TOPMODULE}/vsrc)
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set(CHISEL_OUTPUT_TMP_DIR ${CMAKE_CURRENT_BINARY_DIR}/${TOPMODULE}/vsrc_tmp)
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set(CHISEL_OUTPUT_VERILATOR_CONF ${CHISEL_OUTPUT_DIR}/conf.vlt)
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set(CHISEL_OUTPUT_TOPMODULE ${CHISEL_OUTPUT_DIR}/${TOPMODULE}.sv)
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set(CHISEL_EMIT_ARGS "--target-dir ${CHISEL_OUTPUT_TMP_DIR}")
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# -- Add an always run target to generate verilog files with sbt/bloop,
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# as we don't know if the result files will be different from cmake
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# NOTE: Must reconfigure if we add new files in SCALA_CORE directory
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file(GLOB_RECURSE SCALA_CORE_SOURCES "${SCALA_CORE}/src/main/scala/*.scala")
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file(GLOB_RECURSE SCALA_CORE_RESOURCES "${SCALA_CORE}/src/main/resource/*")
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set(CHISEL_DEPENDENCY ${SCALA_CORE_SOURCES} ${SCALA_CORE_RESOURCES} ${SCALA_CORE}/build.sbt)
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if(BUILD_USE_BLOOP)
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set(CHISEL_TARGET bloop_${TOPMODULE})
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set(CHISEL_TEST_TARGET bloop_${TOPMODULE}_test)
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# Export sbt build config to bloop
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if(NOT EXISTS ${SCALA_CORE}/.bloop)
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execute_process(
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COMMAND sbt bloopInstall
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WORKING_DIRECTORY ${SCALA_CORE}
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)
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endif()
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string(REPLACE " " ";" CHISEL_EMIT_ARGS_LIST ${CHISEL_EMIT_ARGS})
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list(TRANSFORM CHISEL_EMIT_ARGS_LIST PREPEND "--args;")
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add_custom_command(
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OUTPUT ${CHISEL_OUTPUT_TOPMODULE}
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COMMAND bloop run root ${CHISEL_EMIT_ARGS_LIST}
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COMMAND ${CMAKE_COMMAND} -E copy_directory_if_different ${CHISEL_OUTPUT_TMP_DIR} ${CHISEL_OUTPUT_DIR}
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WORKING_DIRECTORY ${SCALA_CORE}
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DEPENDS ${CHISEL_DEPENDENCY}
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COMMAND_EXPAND_LISTS
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)
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add_test(
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NAME bloop_${TOPMODULE}_test
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COMMAND bloop test
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WORKING_DIRECTORY ${SCALA_CORE}
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)
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else()
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set(CHISEL_TARGET sbt_${TOPMODULE})
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set(CHISEL_TEST_TARGET sbt_${TOPMODULE}_test)
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add_custom_command(
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OUTPUT ${CHISEL_OUTPUT_TOPMODULE}
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COMMAND sbt "run ${CHISEL_EMIT_ARGS}"
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COMMAND ${CMAKE_COMMAND} -E copy_directory_if_different ${CHISEL_OUTPUT_TMP_DIR} ${CHISEL_OUTPUT_DIR}
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WORKING_DIRECTORY ${SCALA_CORE}
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DEPENDS ${CHISEL_DEPENDENCY}
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VERBATIM
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)
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add_test(
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NAME sbt_${TOPMODULE}_test
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COMMAND sbt test
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WORKING_DIRECTORY ${SCALA_CORE}
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)
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endif()
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if(NOT EXISTS ${CHISEL_OUTPUT_TOPMODULE})
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# Probably cold build, generate verilog at configure time to produce top module file
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execute_process(
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COMMAND sbt "run ${CHISEL_EMIT_ARGS}"
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WORKING_DIRECTORY ${SCALA_CORE}
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)
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execute_process(
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COMMAND ${CMAKE_COMMAND} -E copy_directory ${CHISEL_OUTPUT_TMP_DIR} ${CHISEL_OUTPUT_DIR}
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)
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endif()
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# -- Build NVBoard executable
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if(BUILD_SIM_NVBOARD_TARGET)
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add_custom_command(
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OUTPUT ${CMAKE_CURRENT_BINARY_DIR}/${TOPMODULE}/auto_bind.cpp
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COMMAND auto_pin_bind ${CMAKE_SOURCE_DIR}/constr/${TOPMODULE}.nxdc ${CMAKE_CURRENT_BINARY_DIR}/${TOPMODULE}/auto_bind.cpp
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DEPENDS ${CMAKE_SOURCE_DIR}/constr/${TOPMODULE}.nxdc
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)
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file(GLOB_RECURSE SOURCES csrc_nvboard/${TOPMODULE}/*.cpp)
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add_executable(V${TOPMODULE}_nvboard ${SOURCES} ${CMAKE_CURRENT_BINARY_DIR}/${TOPMODULE}/auto_bind.cpp)
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verilate(V${TOPMODULE}_nvboard TRACE THREADS
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TOP_MODULE ${TOPMODULE}
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PREFIX V${TOPMODULE}
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SOURCES ${CHISEL_OUTPUT_TOPMODULE}
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INCLUDE_DIRS ${CMAKE_CURRENT_BINARY_DIR}/${TOPMODULE}/vsrc)
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add_dependencies(V${TOPMODULE}_nvboard ChiselBuild_${TOPMODULE})
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target_include_directories(V${TOPMODULE}_nvboard PRIVATE ${NVBOARD_INCLUDE_DIR} ${SDL2_INCLUDE_DIRS})
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target_link_libraries(V${TOPMODULE}_nvboard PRIVATE ${NVBOARD_LIBRARY} SDL2::SDL2 SDL2_image::SDL2_image)
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install(TARGETS V${TOPMODULE}_nvboard)
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add_subdirectory(csrc_nvboard)
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endif()
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# -- Build Verilator executable and add to test
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include_directories(include)
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file(GLOB_RECURSE SOURCES csrc/${TOPMODULE}/*.cpp)
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add_executable(V${TOPMODULE} ${SOURCES})
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add_subdirectory(csrc)
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verilate(V${TOPMODULE} TRACE COVERAGE THREADS
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TOP_MODULE ${TOPMODULE}
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PREFIX V${TOPMODULE}
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SOURCES ${CHISEL_OUTPUT_TOPMODULE} ${CHISEL_OUTPUT_VERILATOR_CONF}
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INCLUDE_DIRS ${CMAKE_CURRENT_BINARY_DIR}/${TOPMODULE}/vsrc
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VERILATOR_ARGS
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"--vpi" # Enable VPI
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)
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add_test(NAME V${TOPMODULE} COMMAND V${TOPMODULE})
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add_test(
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NAME V${TOPMODULE}
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COMMAND V${TOPMODULE}
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--no-bin -m ${PROJECT_SOURCE_DIR}/resource/addi.txt
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--diff-lib /home/xin/repo/ysyx-workbench/nemu/build/riscv32-nemu-interpreter-so)
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# -- Add build tracking
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if(ENABLE_YSYX_GIT_TRACKER)
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62
npc/cmake/ChiselBuild.cmake
Normal file
62
npc/cmake/ChiselBuild.cmake
Normal file
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@ -0,0 +1,62 @@
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# -- Add an always run target to generate verilog files with sbt/bloop,
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# as we don't know if the result files will be different from cmake
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# NOTE: Must reconfigure if we add new files in SCALA_CORE directory
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file(GLOB_RECURSE SCALA_CORE_SOURCES "${SCALA_CORE}/src/main/scala/*.scala")
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file(GLOB_RECURSE SCALA_CORE_RESOURCES "${SCALA_CORE}/src/main/resources/*")
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set(CHISEL_DEPENDENCY ${SCALA_CORE_SOURCES} ${SCALA_CORE_RESOURCES} ${SCALA_CORE}/build.sbt)
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if(BUILD_USE_BLOOP)
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set(CHISEL_TARGET bloop_${TOPMODULE})
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set(CHISEL_TEST_TARGET bloop_${TOPMODULE}_test)
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# Export sbt build config to bloop
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if(NOT EXISTS ${SCALA_CORE}/.bloop)
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execute_process(
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COMMAND sbt bloopInstall
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WORKING_DIRECTORY ${SCALA_CORE}
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)
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endif()
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string(REPLACE " " ";" CHISEL_EMIT_ARGS_LIST ${CHISEL_EMIT_ARGS})
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list(TRANSFORM CHISEL_EMIT_ARGS_LIST PREPEND "--args;")
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add_custom_command(
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OUTPUT ${CHISEL_OUTPUT_TOPMODULE}
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COMMAND bloop run root ${CHISEL_EMIT_ARGS_LIST}
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COMMAND ${CMAKE_COMMAND} -E copy_directory_if_different ${CHISEL_OUTPUT_TMP_DIR} ${CHISEL_OUTPUT_DIR}
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WORKING_DIRECTORY ${SCALA_CORE}
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DEPENDS ${CHISEL_DEPENDENCY}
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COMMAND_EXPAND_LISTS
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COMMENT "Run bloop from CMake"
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)
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# add_test(
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# NAME bloop_${TOPMODULE}_test
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# COMMAND bloop test
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# WORKING_DIRECTORY ${SCALA_CORE}
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# )
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else()
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set(CHISEL_TARGET sbt_${TOPMODULE})
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set(CHISEL_TEST_TARGET sbt_${TOPMODULE}_test)
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add_custom_command(
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OUTPUT ${CHISEL_OUTPUT_TOPMODULE}
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COMMAND sbt "run ${CHISEL_EMIT_ARGS}"
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COMMAND ${CMAKE_COMMAND} -E copy_directory_if_different ${CHISEL_OUTPUT_TMP_DIR} ${CHISEL_OUTPUT_DIR}
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WORKING_DIRECTORY ${SCALA_CORE}
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# DEPENDS ${CHISEL_DEPENDENCY} test.scala
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VERBATIM
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COMMENT "Run sbt from CMake"
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)
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add_test(
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NAME sbt_${TOPMODULE}_test
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COMMAND sbt test
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WORKING_DIRECTORY ${SCALA_CORE}
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)
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endif()
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if(NOT EXISTS ${CHISEL_OUTPUT_DIR})
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# Probably cold build, generate verilog at configure time to produce top module file
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execute_process(
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COMMAND sbt "run ${CHISEL_EMIT_ARGS}"
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WORKING_DIRECTORY ${SCALA_CORE}
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)
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execute_process(
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COMMAND ${CMAKE_COMMAND} -E copy_directory ${CHISEL_OUTPUT_TMP_DIR} ${CHISEL_OUTPUT_DIR}
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)
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endif()
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1
npc/csrc/CMakeLists.txt
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1
npc/csrc/CMakeLists.txt
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@ -0,0 +1 @@
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add_subdirectory(${TOPMODULE})
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11
npc/csrc/Flow/CMakeLists.txt
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11
npc/csrc/Flow/CMakeLists.txt
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@ -0,0 +1,11 @@
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include(ChiselBuild)
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add_executable(V${TOPMODULE} config.cpp main.cpp)
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verilate(V${TOPMODULE} TRACE COVERAGE THREADS
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TOP_MODULE ${TOPMODULE}
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PREFIX V${TOPMODULE}
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SOURCES ${CHISEL_OUTPUT_TOPMODULE} ${CHISEL_OUTPUT_VERILATOR_CONF}
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INCLUDE_DIRS ${CHISEL_OUTPUT_DIR}
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VERILATOR_ARGS
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"--vpi" # Enable VPI
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)
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23
npc/csrc_nvboard/Flow/CMakeLists.txt
Normal file
23
npc/csrc_nvboard/Flow/CMakeLists.txt
Normal file
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@ -0,0 +1,23 @@
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include(ChiselBuild)
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add_custom_command(
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OUTPUT ${CMAKE_CURRENT_BINARY_DIR}/${TOPMODULE}/auto_bind.cpp
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COMMAND auto_pin_bind ${CMAKE_SOURCE_DIR}/constr/${TOPMODULE}.nxdc ${CMAKE_CURRENT_BINARY_DIR}/${TOPMODULE}/auto_bind.cpp
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DEPENDS ${CMAKE_SOURCE_DIR}/constr/${TOPMODULE}.nxdc
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)
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add_executable(V${TOPMODULE}_nvboard
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${CMAKE_CURRENT_BINARY_DIR}/${TOPMODULE}/auto_bind.cpp
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main.cpp
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)
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verilate(V${TOPMODULE}_nvboard TRACE THREADS
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TOP_MODULE ${TOPMODULE}
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PREFIX V${TOPMODULE}
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SOURCES ${CHISEL_OUTPUT_TOPMODULE}
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INCLUDE_DIRS ${CHISEL_OUTPUT_DIR})
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target_include_directories(V${TOPMODULE}_nvboard PRIVATE ${NVBOARD_INCLUDE_DIR} ${SDL2_INCLUDE_DIRS})
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target_link_libraries(V${TOPMODULE}_nvboard PRIVATE ${NVBOARD_LIBRARY} SDL2::SDL2 SDL2_image::SDL2_image)
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install(TARGETS V${TOPMODULE}_nvboard)
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@ -39,6 +39,7 @@
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packages = [
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clang-tools
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cmake
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ninja
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coursier
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espresso
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bloop
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