npc: add cmake-format for verilate macro
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This commit is contained in:
xinyangli 2024-08-02 12:08:03 +08:00
parent de9f770d08
commit d9efde7a44
Signed by: xin
SSH key fingerprint: SHA256:qZ/tzd8lYRtUFSrfBDBMcUqV4GHKxqeqRA3huItgvbk
5 changed files with 42 additions and 40 deletions

24
npc/.cmake-format Normal file
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@ -0,0 +1,24 @@
additional_commands = {
"verilate": {
"pargs": 1,
"flags": [
"COVERAGE",
"SYSTEMC",
"THREADS",
"TRACE_THREADS",
"TRACE",
"TRACE_FST"
],
"kwargs": {
"DIRECTORY": "?",
"INCLUDE_DIRS": "*",
"OPT_SLOW": "*",
"OPT_FAST": "*",
"OPT_GLOBAL": "*",
"PREFIX": "?",
"SOURCES": "+",
"TOP_MODULE": "?",
"VERILATOR_ARGS": "*",
}
}
}

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@ -1,3 +1,3 @@
set substitute-path /build/am-kernels /home/xin/repo/ysyx-workbench/am-kernels set substitute-path /build/am-kernels /home/xin/repo/ysyx-workbench/am-kernels
file /nix/store/g8hi9rlby6xm7grzcpfc8lpmdfgv1i92-am-kernel-riscv32-none-elf-2024-07-10/libexec/am-kernels/add file /nix/store/g8hi9rlby6xm7grzcpfc8lpmdfgv1i92-am-kernel-riscv32-none-elf-2024-07-10/libexec/am-kernels/add
target remote /tmp/gdbstub-npc.sock target remote gdbstub-npc.sock

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@ -1 +0,0 @@
addSbtPlugin("ch.epfl.scala" % "sbt-bloop" % "1.5.2")

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@ -5,20 +5,12 @@ target_include_directories(V${TOPMODULE} PRIVATE ${CMAKE_SOURCE_DIR}/include)
verilate( verilate(
V${TOPMODULE} V${TOPMODULE}
TRACE TRACE THREADS
THREADS TOP_MODULE ${TOPMODULE}
TOP_MODULE PREFIX V${TOPMODULE}
${TOPMODULE} SOURCES ${CHISEL_OUTPUT_TOPMODULE} ${CHISEL_OUTPUT_VERILATOR_CONF}
PREFIX INCLUDE_DIRS ${CHISEL_OUTPUT_DIR}
V${TOPMODULE} VERILATOR_ARGS "--vpi" "-Wno-UNOPTFLAT")
SOURCES
${CHISEL_OUTPUT_TOPMODULE}
${CHISEL_OUTPUT_VERILATOR_CONF}
INCLUDE_DIRS
${CHISEL_OUTPUT_DIR}
VERILATOR_ARGS
"--vpi" # Enable VPI
"-Wno-UNOPTFLAT")
foreach(DIFFTEST_BINARY_FILE IN LISTS DIFFTEST_BINARY_FILES) foreach(DIFFTEST_BINARY_FILE IN LISTS DIFFTEST_BINARY_FILES)
get_filename_component(FILENAME ${DIFFTEST_BINARY_FILE} NAME_WE) get_filename_component(FILENAME ${DIFFTEST_BINARY_FILE} NAME_WE)
@ -36,17 +28,9 @@ target_link_options(${TOPMODULE} PRIVATE -Wl,-E)
verilate( verilate(
${TOPMODULE} ${TOPMODULE}
TRACE TRACE THREADS
THREADS TOP_MODULE ${TOPMODULE}
TOP_MODULE PREFIX V${TOPMODULE}
${TOPMODULE} SOURCES ${CHISEL_OUTPUT_TOPMODULE} ${CHISEL_OUTPUT_VERILATOR_CONF}
PREFIX INCLUDE_DIRS ${CHISEL_OUTPUT_DIR}
V${TOPMODULE} VERILATOR_ARGS "--vpi" "-Wno-UNOPTFLAT")
SOURCES
${CHISEL_OUTPUT_TOPMODULE}
${CHISEL_OUTPUT_VERILATOR_CONF}
INCLUDE_DIRS
${CHISEL_OUTPUT_DIR}
VERILATOR_ARGS
"--vpi" # Enable VPI
"-Wno-UNOPTFLAT")

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@ -11,16 +11,11 @@ add_executable(V${TOPMODULE}_nvboard
verilate( verilate(
V${TOPMODULE}_nvboard V${TOPMODULE}_nvboard
TRACE TRACE THREADS
THREADS TOP_MODULE ${TOPMODULE}
TOP_MODULE PREFIX V${TOPMODULE}
${TOPMODULE} SOURCES ${CHISEL_OUTPUT_TOPMODULE}
PREFIX INCLUDE_DIRS ${CHISEL_OUTPUT_DIR})
V${TOPMODULE}
SOURCES
${CHISEL_OUTPUT_TOPMODULE}
INCLUDE_DIRS
${CHISEL_OUTPUT_DIR})
target_include_directories(V${TOPMODULE}_nvboard PRIVATE ${NVBOARD_INCLUDE_DIR} target_include_directories(V${TOPMODULE}_nvboard PRIVATE ${NVBOARD_INCLUDE_DIR}
${SDL2_INCLUDE_DIRS}) ${SDL2_INCLUDE_DIRS})