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ysyx_22040000 李心杨
Linux calcite 6.1.69 #1-NixOS SMP PREEMPT_DYNAMIC Wed Dec 20 16:00:29 UTC 2023 x86_64 GNU/Linux
 11:09:46  up  19:48,  2 users,  load average: 0.84, 0.64, 0.85
This commit is contained in:
tracer-ysyx 2024-01-01 11:09:46 +08:00 committed by xinyangli
parent 88a55f87ea
commit d278cae607
4 changed files with 19 additions and 33 deletions
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1
.gitignore vendored
View file

@ -11,3 +11,4 @@
!.gitignore
!init.sh
/fceux-am
/nvboard

12
npc/Makefile
View file

@ -1,9 +1,13 @@
VSRC := $(wildcard vsrc/*.v)
CPPSRC := $(addprefix $(PWD)/,$(wildcard csrc/*.cpp))
CPPSRC += $(SRC_AUTO_BIND)
NXDC_FILES = $(abspath constr/top.nxdc)
PREFIX ?= build
OBJDIR := $(PREFIX)/obj
SUBMAKE := $(OBJDIR)/Vexample.mk
VERILATOR_FLAGS := --cc --exe
NVBOARD_HOME ?= $(abspath ../nvboard)
all: sim
@ -18,11 +22,17 @@ $(OBJDIR)/Vexample: $(SUBMAKE)
$(MAKE) -C $(OBJDIR) -f $(notdir $(SUBMAKE)) Vexample
$(SUBMAKE): $(VSRC) $(CPPSRC) $(OBJDIR)
verilator $(VERILATOR_FLAGS) --Mdir $(PWD)/$(OBJDIR) $(VSRC) $(CPPSRC)
verilator $(VERILATOR_FLAGS) \
--Mdir $(abspath $(OBJDIR)) $(VSRC) $(CPPSRC)
# $(addprefix -CFLAGS , $(CXXFLAGS)) $(addprefix -LDFLAGS , $(LDFLAGS)) \
$(OBJDIR):
mkdir -p $(OBJDIR)
SRC_AUTO_BIND = $(abspath $(PREFIX)/auto_bind.cpp)
$(SRC_AUTO_BIND): $(NXDC_FILES)
python3 $(NVBOARD_HOME)/scripts/auto_pin_bind.py $^ $@
include ../Makefile
.PHONY: clean

7
npc/flake.nix
View file

@ -14,7 +14,14 @@
gtkwave
gcc
bear
clang-tools
rnix-lsp
];
nativeBuildInputs = with pkgs; [
python3
];
shellHook = ''
export NEMU_HOME=/home/xin/repo/ysyx-workbench/nemu
'';

32
npc/trace/main.cpp
View file

@ -1,32 +0,0 @@
#include "verilated_vcd_c.h"
#include "Vexample.h"
#include "verilated.h"
int main(int argc, char **argv, char **env) {
}
int main(int argc, char **argv, char **env) {
Verilated::commandArgs(argc, argv);
Verilated::traceEverOn(true);
VerilatedVcdC* tfp = new VerilatedVcdC;
Vexample *top = new Vexample;
int round = 100;
while (round--) {
int a = rand() & 1;
int b = rand() & 1;
top->a = a;
top->b = b;
top->eval();
printf("a = %d, b = %d, f = %d\n", a, b, top->f);
assert(top->f == (a ^ b));
}
exit(0);
topp->trace (tfp, 99);
tfp->open ("obj_dir/t_trace_ena_cc/simx.vcd");
...
while (sc_time_stamp() < sim_time && !Verilated::gotFinish()) {
main_time += #;
tfp->dump (main_time);
}
tfp->close();
}