From c1f25225e0bc9f70be620357e7c317fff6c557a5 Mon Sep 17 00:00:00 2001
From: tracer-ysyx <tracer@ysyx.org>
Date: Thu, 4 Jan 2024 17:33:49 +0800
Subject: [PATCH] =?UTF-8?q?>=20nvboard=20ysyx=5F22040000=20=E6=9D=8E?=
 =?UTF-8?q?=E5=BF=83=E6=9D=A8=20Linux=20calcite=206.1.69=20#1-NixOS=20SMP?=
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 =?UTF-8?q?=20x86=5F64=20GNU/Linux=20=2017:33:49=20=20up=20=20=202:20,=20?=
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---
 npc/Makefile | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/npc/Makefile b/npc/Makefile
index 24a1dec..7748453 100644
--- a/npc/Makefile
+++ b/npc/Makefile
@@ -1,6 +1,6 @@
 NVBOARD_HOME ?= $(abspath ../nvboard)
 PREFIX ?= build
-OBJDIR := $(PREFIX)/obj
+OBJDIR = $(PREFIX)/obj
 CHISEL_VDIR := $(PREFIX)/chisel
 
 CPPSRCS := $(addprefix $(PWD)/,$(wildcard csrc/*.cpp))
@@ -12,7 +12,7 @@ CHISEL_TOP_PACKAGE := learning
 CHISEL_TOP_MODULE := Main
 CHISEL_TARGET := verilog
 
-SUBMAKE := $(OBJDIR)/V$(CHISEL_TOP_MODULE).mk
+SUBMAKE = $(OBJDIR)/V$(CHISEL_TOP_MODULE).mk
 
 # Pretty printing
 MAKEFLAGS += --no-print-directory