> sim RTL
ysyx_22040000 李心杨 Linux calcite 6.1.65 #1-NixOS SMP PREEMPT_DYNAMIC Sun Dec 3 06:32:13 UTC 2023 x86_64 GNU/Linux 19:41:15 up 22:39, 2 users, load average: 0.63, 0.51, 0.55
This commit is contained in:
tracer-ysyx
parent
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commit
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15 changed files with 3 additions and 860 deletions
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@ -1,6 +1,6 @@
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VSRC := $(wildcard vsrc/*.v)
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CPPSRC := $(wildcard csrc/*.cpp)
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PREFIX ?= .
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CPPSRC := $(addprefix $(PWD)/,$(wildcard csrc/*.cpp))
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PREFIX ?= build
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OBJDIR := $(PREFIX)/obj
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all: $(OBJDIR)
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@ -8,7 +8,7 @@ all: $(OBJDIR)
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sim: all
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$(call git_commit, "sim RTL") # DO NOT REMOVE THIS LINE!!!
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@echo "Write this Makefile by your self."
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@echo "Running" $(OBJDIR)/Vexample
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$(OBJDIR)/Vexample
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@ -1,105 +0,0 @@
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// Verilated -*- C++ -*-
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// DESCRIPTION: Verilator output: Model implementation (design independent parts)
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#include "Vexample__pch.h"
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//============================================================
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// Constructors
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Vexample::Vexample(VerilatedContext* _vcontextp__, const char* _vcname__)
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: VerilatedModel{*_vcontextp__}
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, vlSymsp{new Vexample__Syms(contextp(), _vcname__, this)}
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, a{vlSymsp->TOP.a}
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, b{vlSymsp->TOP.b}
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, f{vlSymsp->TOP.f}
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, rootp{&(vlSymsp->TOP)}
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{
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// Register model with the context
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contextp()->addModel(this);
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}
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Vexample::Vexample(const char* _vcname__)
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: Vexample(Verilated::threadContextp(), _vcname__)
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{
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}
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//============================================================
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// Destructor
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Vexample::~Vexample() {
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delete vlSymsp;
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}
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//============================================================
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// Evaluation function
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#ifdef VL_DEBUG
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void Vexample___024root___eval_debug_assertions(Vexample___024root* vlSelf);
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#endif // VL_DEBUG
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void Vexample___024root___eval_static(Vexample___024root* vlSelf);
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void Vexample___024root___eval_initial(Vexample___024root* vlSelf);
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void Vexample___024root___eval_settle(Vexample___024root* vlSelf);
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void Vexample___024root___eval(Vexample___024root* vlSelf);
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void Vexample::eval_step() {
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VL_DEBUG_IF(VL_DBG_MSGF("+++++TOP Evaluate Vexample::eval_step\n"); );
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#ifdef VL_DEBUG
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// Debug assertions
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Vexample___024root___eval_debug_assertions(&(vlSymsp->TOP));
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#endif // VL_DEBUG
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vlSymsp->__Vm_deleter.deleteAll();
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if (VL_UNLIKELY(!vlSymsp->__Vm_didInit)) {
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vlSymsp->__Vm_didInit = true;
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VL_DEBUG_IF(VL_DBG_MSGF("+ Initial\n"););
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Vexample___024root___eval_static(&(vlSymsp->TOP));
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Vexample___024root___eval_initial(&(vlSymsp->TOP));
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Vexample___024root___eval_settle(&(vlSymsp->TOP));
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}
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VL_DEBUG_IF(VL_DBG_MSGF("+ Eval\n"););
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Vexample___024root___eval(&(vlSymsp->TOP));
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// Evaluate cleanup
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Verilated::endOfEval(vlSymsp->__Vm_evalMsgQp);
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}
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//============================================================
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// Events and timing
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bool Vexample::eventsPending() { return false; }
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uint64_t Vexample::nextTimeSlot() {
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VL_FATAL_MT(__FILE__, __LINE__, "", "%Error: No delays in the design");
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return 0;
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}
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//============================================================
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// Utilities
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const char* Vexample::name() const {
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return vlSymsp->name();
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}
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//============================================================
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// Invoke final blocks
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void Vexample___024root___eval_final(Vexample___024root* vlSelf);
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VL_ATTR_COLD void Vexample::final() {
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Vexample___024root___eval_final(&(vlSymsp->TOP));
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}
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//============================================================
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// Implementations of abstract methods from VerilatedModel
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const char* Vexample::hierName() const { return vlSymsp->name(); }
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const char* Vexample::modelName() const { return "Vexample"; }
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unsigned Vexample::threads() const { return 1; }
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void Vexample::prepareClone() const { contextp()->prepareClone(); }
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void Vexample::atClone() const {
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contextp()->threadPoolpOnClone();
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}
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//============================================================
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// Trace configuration
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VL_ATTR_COLD void Vexample::trace(VerilatedVcdC* tfp, int levels, int options) {
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vl_fatal(__FILE__, __LINE__, __FILE__,"'Vexample::trace()' called on model that was Verilated without --trace option");
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}
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@ -1,83 +0,0 @@
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// Verilated -*- C++ -*-
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// DESCRIPTION: Verilator output: Primary model header
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//
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// This header should be included by all source files instantiating the design.
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// The class here is then constructed to instantiate the design.
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// See the Verilator manual for examples.
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#ifndef VERILATED_VEXAMPLE_H_
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#define VERILATED_VEXAMPLE_H_ // guard
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#include "verilated.h"
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class Vexample__Syms;
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class Vexample___024root;
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// This class is the main interface to the Verilated model
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class alignas(VL_CACHE_LINE_BYTES) Vexample VL_NOT_FINAL : public VerilatedModel {
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private:
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// Symbol table holding complete model state (owned by this class)
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Vexample__Syms* const vlSymsp;
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public:
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// PORTS
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// The application code writes and reads these signals to
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// propagate new values into/out from the Verilated model.
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VL_IN8(&a,0,0);
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VL_IN8(&b,0,0);
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VL_OUT8(&f,0,0);
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// CELLS
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// Public to allow access to /* verilator public */ items.
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// Otherwise the application code can consider these internals.
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// Root instance pointer to allow access to model internals,
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// including inlined /* verilator public_flat_* */ items.
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Vexample___024root* const rootp;
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// CONSTRUCTORS
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/// Construct the model; called by application code
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/// If contextp is null, then the model will use the default global context
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/// If name is "", then makes a wrapper with a
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/// single model invisible with respect to DPI scope names.
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explicit Vexample(VerilatedContext* contextp, const char* name = "TOP");
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explicit Vexample(const char* name = "TOP");
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/// Destroy the model; called (often implicitly) by application code
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virtual ~Vexample();
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private:
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VL_UNCOPYABLE(Vexample); ///< Copying not allowed
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public:
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// API METHODS
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/// Evaluate the model. Application must call when inputs change.
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void eval() { eval_step(); }
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/// Evaluate when calling multiple units/models per time step.
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void eval_step();
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/// Evaluate at end of a timestep for tracing, when using eval_step().
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/// Application must call after all eval() and before time changes.
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void eval_end_step() {}
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/// Simulation complete, run final blocks. Application must call on completion.
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void final();
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/// Are there scheduled events to handle?
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bool eventsPending();
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/// Returns time at next time slot. Aborts if !eventsPending()
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uint64_t nextTimeSlot();
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/// Trace signals in the model; called by application code
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void trace(VerilatedVcdC* tfp, int levels, int options = 0);
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/// Retrieve name of this model instance (as passed to constructor).
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const char* name() const;
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// Abstract methods from VerilatedModel
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const char* hierName() const override final;
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const char* modelName() const override final;
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unsigned threads() const override final;
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/// Prepare for cloning the model at the process level (e.g. fork in Linux)
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/// Release necessary resources. Called before cloning.
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void prepareClone() const;
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/// Re-init after cloning the model at the process level (e.g. fork in Linux)
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/// Re-allocate necessary resources. Called after cloning.
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void atClone() const;
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};
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#endif // guard
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@ -1,68 +0,0 @@
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# Verilated -*- Makefile -*-
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# DESCRIPTION: Verilator output: Makefile for building Verilated archive or executable
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#
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# Execute this makefile from the object directory:
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# make -f Vexample.mk
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default: Vexample
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### Constants...
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# Perl executable (from $PERL)
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PERL = perl
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# Path to Verilator kit (from $VERILATOR_ROOT)
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VERILATOR_ROOT = /nix/store/lyzgj5m2zhsw9m3v1fnzr3dp1z9myyaz-verilator-5.018/share/verilator
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# SystemC include directory with systemc.h (from $SYSTEMC_INCLUDE)
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SYSTEMC_INCLUDE ?=
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# SystemC library directory with libsystemc.a (from $SYSTEMC_LIBDIR)
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SYSTEMC_LIBDIR ?=
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### Switches...
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# C++ code coverage 0/1 (from --prof-c)
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VM_PROFC = 0
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# SystemC output mode? 0/1 (from --sc)
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VM_SC = 0
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# Legacy or SystemC output mode? 0/1 (from --sc)
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VM_SP_OR_SC = $(VM_SC)
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# Deprecated
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VM_PCLI = 1
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# Deprecated: SystemC architecture to find link library path (from $SYSTEMC_ARCH)
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VM_SC_TARGET_ARCH = linux
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### Vars...
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# Design prefix (from --prefix)
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VM_PREFIX = Vexample
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# Module prefix (from --prefix)
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VM_MODPREFIX = Vexample
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# User CFLAGS (from -CFLAGS on Verilator command line)
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VM_USER_CFLAGS = \
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# User LDLIBS (from -LDFLAGS on Verilator command line)
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VM_USER_LDLIBS = \
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# User .cpp files (from .cpp's on Verilator command line)
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VM_USER_CLASSES = \
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main \
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# User .cpp directories (from .cpp's on Verilator command line)
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VM_USER_DIR = \
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csrc \
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### Default rules...
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# Include list of all generated classes
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include Vexample_classes.mk
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# Include global rules
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include $(VERILATOR_ROOT)/include/verilated.mk
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### Executable rules... (from --exe)
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VPATH += $(VM_USER_DIR)
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main.o: csrc/main.cpp
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$(OBJCACHE) $(CXX) $(CXXFLAGS) $(CPPFLAGS) $(OPT_FAST) -c -o $@ $<
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### Link rules... (from --exe)
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Vexample: $(VK_USER_OBJS) $(VK_GLOBAL_OBJS) $(VM_PREFIX)__ALL.a $(VM_HIER_LIBS)
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$(LINK) $(LDFLAGS) $^ $(LOADLIBES) $(LDLIBS) $(LIBS) $(SC_LIBS) -o $@
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# Verilated -*- Makefile -*-
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@ -1,9 +0,0 @@
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// DESCRIPTION: Generated by verilator_includer via makefile
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#define VL_INCLUDE_OPT include
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#include "Vexample.cpp"
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#include "Vexample___024root__DepSet_h625e39dc__0.cpp"
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#include "Vexample___024root__DepSet_hcb5acca5__0.cpp"
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#include "Vexample___024root__Slow.cpp"
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#include "Vexample___024root__DepSet_h625e39dc__0__Slow.cpp"
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#include "Vexample___024root__DepSet_hcb5acca5__0__Slow.cpp"
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#include "Vexample__Syms.cpp"
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// Verilated -*- C++ -*-
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// DESCRIPTION: Verilator output: Symbol table implementation internals
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#include "Vexample__pch.h"
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#include "Vexample.h"
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#include "Vexample___024root.h"
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// FUNCTIONS
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Vexample__Syms::~Vexample__Syms()
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{
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}
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Vexample__Syms::Vexample__Syms(VerilatedContext* contextp, const char* namep, Vexample* modelp)
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: VerilatedSyms{contextp}
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// Setup internal state of the Syms class
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, __Vm_modelp{modelp}
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// Setup module instances
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, TOP{this, namep}
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{
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// Configure time unit / time precision
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_vm_contextp__->timeunit(-12);
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_vm_contextp__->timeprecision(-12);
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// Setup each module's pointers to their submodules
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// Setup each module's pointer back to symbol table (for public functions)
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TOP.__Vconfigure(true);
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}
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// Verilated -*- C++ -*-
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// DESCRIPTION: Verilator output: Symbol table internal header
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//
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// Internal details; most calling programs do not need this header,
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// unless using verilator public meta comments.
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#ifndef VERILATED_VEXAMPLE__SYMS_H_
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#define VERILATED_VEXAMPLE__SYMS_H_ // guard
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#include "verilated.h"
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// INCLUDE MODEL CLASS
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#include "Vexample.h"
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// INCLUDE MODULE CLASSES
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#include "Vexample___024root.h"
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// SYMS CLASS (contains all model state)
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class alignas(VL_CACHE_LINE_BYTES)Vexample__Syms final : public VerilatedSyms {
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public:
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// INTERNAL STATE
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Vexample* const __Vm_modelp;
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VlDeleter __Vm_deleter;
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bool __Vm_didInit = false;
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// MODULE INSTANCE STATE
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Vexample___024root TOP;
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// CONSTRUCTORS
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Vexample__Syms(VerilatedContext* contextp, const char* namep, Vexample* modelp);
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~Vexample__Syms();
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// METHODS
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const char* name() { return TOP.name(); }
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};
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#endif // guard
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// Verilated -*- C++ -*-
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// DESCRIPTION: Verilator output: Design internal header
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// See Vexample.h for the primary calling header
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#ifndef VERILATED_VEXAMPLE___024ROOT_H_
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#define VERILATED_VEXAMPLE___024ROOT_H_ // guard
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#include "verilated.h"
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class Vexample__Syms;
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class alignas(VL_CACHE_LINE_BYTES) Vexample___024root final : public VerilatedModule {
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public:
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// DESIGN SPECIFIC STATE
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VL_IN8(a,0,0);
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VL_IN8(b,0,0);
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VL_OUT8(f,0,0);
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CData/*0:0*/ __VstlFirstIteration;
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CData/*0:0*/ __VicoFirstIteration;
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CData/*0:0*/ __VactContinue;
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IData/*31:0*/ __VactIterCount;
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VlTriggerVec<1> __VstlTriggered;
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VlTriggerVec<1> __VicoTriggered;
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VlTriggerVec<0> __VactTriggered;
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VlTriggerVec<0> __VnbaTriggered;
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||||
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// INTERNAL VARIABLES
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Vexample__Syms* const vlSymsp;
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// CONSTRUCTORS
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||||
Vexample___024root(Vexample__Syms* symsp, const char* v__name);
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~Vexample___024root();
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||||
VL_UNCOPYABLE(Vexample___024root);
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// INTERNAL METHODS
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||||
void __Vconfigure(bool first);
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||||
};
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||||
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||||
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||||
#endif // guard
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||||
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@ -1,40 +0,0 @@
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// Verilated -*- C++ -*-
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||||
// DESCRIPTION: Verilator output: Design implementation internals
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||||
// See Vexample.h for the primary calling header
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||||
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||||
#include "Vexample__pch.h"
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||||
#include "Vexample__Syms.h"
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#include "Vexample___024root.h"
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||||
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||||
#ifdef VL_DEBUG
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||||
VL_ATTR_COLD void Vexample___024root___dump_triggers__ico(Vexample___024root* vlSelf);
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#endif // VL_DEBUG
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||||
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||||
void Vexample___024root___eval_triggers__ico(Vexample___024root* vlSelf) {
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||||
if (false && vlSelf) {} // Prevent unused
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||||
Vexample__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
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||||
VL_DEBUG_IF(VL_DBG_MSGF("+ Vexample___024root___eval_triggers__ico\n"); );
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||||
// Body
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||||
vlSelf->__VicoTriggered.set(0U, (IData)(vlSelf->__VicoFirstIteration));
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||||
#ifdef VL_DEBUG
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||||
if (VL_UNLIKELY(vlSymsp->_vm_contextp__->debug())) {
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||||
Vexample___024root___dump_triggers__ico(vlSelf);
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||||
}
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||||
#endif
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||||
}
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||||
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||||
#ifdef VL_DEBUG
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||||
VL_ATTR_COLD void Vexample___024root___dump_triggers__act(Vexample___024root* vlSelf);
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||||
#endif // VL_DEBUG
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||||
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||||
void Vexample___024root___eval_triggers__act(Vexample___024root* vlSelf) {
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if (false && vlSelf) {} // Prevent unused
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||||
Vexample__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
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VL_DEBUG_IF(VL_DBG_MSGF("+ Vexample___024root___eval_triggers__act\n"); );
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// Body
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||||
#ifdef VL_DEBUG
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||||
if (VL_UNLIKELY(vlSymsp->_vm_contextp__->debug())) {
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||||
Vexample___024root___dump_triggers__act(vlSelf);
|
||||
}
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||||
#endif
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||||
}
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||||
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@ -1,24 +0,0 @@
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// Verilated -*- C++ -*-
|
||||
// DESCRIPTION: Verilator output: Design implementation internals
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||||
// See Vexample.h for the primary calling header
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||||
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||||
#include "Vexample__pch.h"
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||||
#include "Vexample__Syms.h"
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||||
#include "Vexample___024root.h"
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||||
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||||
#ifdef VL_DEBUG
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||||
VL_ATTR_COLD void Vexample___024root___dump_triggers__stl(Vexample___024root* vlSelf);
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||||
#endif // VL_DEBUG
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||||
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||||
VL_ATTR_COLD void Vexample___024root___eval_triggers__stl(Vexample___024root* vlSelf) {
|
||||
if (false && vlSelf) {} // Prevent unused
|
||||
Vexample__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
|
||||
VL_DEBUG_IF(VL_DBG_MSGF("+ Vexample___024root___eval_triggers__stl\n"); );
|
||||
// Body
|
||||
vlSelf->__VstlTriggered.set(0U, (IData)(vlSelf->__VstlFirstIteration));
|
||||
#ifdef VL_DEBUG
|
||||
if (VL_UNLIKELY(vlSymsp->_vm_contextp__->debug())) {
|
||||
Vexample___024root___dump_triggers__stl(vlSelf);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
|
@ -1,171 +0,0 @@
|
|||
// Verilated -*- C++ -*-
|
||||
// DESCRIPTION: Verilator output: Design implementation internals
|
||||
// See Vexample.h for the primary calling header
|
||||
|
||||
#include "Vexample__pch.h"
|
||||
#include "Vexample___024root.h"
|
||||
|
||||
VL_INLINE_OPT void Vexample___024root___ico_sequent__TOP__0(Vexample___024root* vlSelf) {
|
||||
if (false && vlSelf) {} // Prevent unused
|
||||
Vexample__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
|
||||
VL_DEBUG_IF(VL_DBG_MSGF("+ Vexample___024root___ico_sequent__TOP__0\n"); );
|
||||
// Body
|
||||
vlSelf->f = ((IData)(vlSelf->a) ^ (IData)(vlSelf->b));
|
||||
}
|
||||
|
||||
void Vexample___024root___eval_ico(Vexample___024root* vlSelf) {
|
||||
if (false && vlSelf) {} // Prevent unused
|
||||
Vexample__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
|
||||
VL_DEBUG_IF(VL_DBG_MSGF("+ Vexample___024root___eval_ico\n"); );
|
||||
// Body
|
||||
if ((1ULL & vlSelf->__VicoTriggered.word(0U))) {
|
||||
Vexample___024root___ico_sequent__TOP__0(vlSelf);
|
||||
}
|
||||
}
|
||||
|
||||
void Vexample___024root___eval_triggers__ico(Vexample___024root* vlSelf);
|
||||
|
||||
bool Vexample___024root___eval_phase__ico(Vexample___024root* vlSelf) {
|
||||
if (false && vlSelf) {} // Prevent unused
|
||||
Vexample__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
|
||||
VL_DEBUG_IF(VL_DBG_MSGF("+ Vexample___024root___eval_phase__ico\n"); );
|
||||
// Init
|
||||
CData/*0:0*/ __VicoExecute;
|
||||
// Body
|
||||
Vexample___024root___eval_triggers__ico(vlSelf);
|
||||
__VicoExecute = vlSelf->__VicoTriggered.any();
|
||||
if (__VicoExecute) {
|
||||
Vexample___024root___eval_ico(vlSelf);
|
||||
}
|
||||
return (__VicoExecute);
|
||||
}
|
||||
|
||||
void Vexample___024root___eval_act(Vexample___024root* vlSelf) {
|
||||
if (false && vlSelf) {} // Prevent unused
|
||||
Vexample__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
|
||||
VL_DEBUG_IF(VL_DBG_MSGF("+ Vexample___024root___eval_act\n"); );
|
||||
}
|
||||
|
||||
void Vexample___024root___eval_nba(Vexample___024root* vlSelf) {
|
||||
if (false && vlSelf) {} // Prevent unused
|
||||
Vexample__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
|
||||
VL_DEBUG_IF(VL_DBG_MSGF("+ Vexample___024root___eval_nba\n"); );
|
||||
}
|
||||
|
||||
void Vexample___024root___eval_triggers__act(Vexample___024root* vlSelf);
|
||||
|
||||
bool Vexample___024root___eval_phase__act(Vexample___024root* vlSelf) {
|
||||
if (false && vlSelf) {} // Prevent unused
|
||||
Vexample__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
|
||||
VL_DEBUG_IF(VL_DBG_MSGF("+ Vexample___024root___eval_phase__act\n"); );
|
||||
// Init
|
||||
VlTriggerVec<0> __VpreTriggered;
|
||||
CData/*0:0*/ __VactExecute;
|
||||
// Body
|
||||
Vexample___024root___eval_triggers__act(vlSelf);
|
||||
__VactExecute = vlSelf->__VactTriggered.any();
|
||||
if (__VactExecute) {
|
||||
__VpreTriggered.andNot(vlSelf->__VactTriggered, vlSelf->__VnbaTriggered);
|
||||
vlSelf->__VnbaTriggered.thisOr(vlSelf->__VactTriggered);
|
||||
Vexample___024root___eval_act(vlSelf);
|
||||
}
|
||||
return (__VactExecute);
|
||||
}
|
||||
|
||||
bool Vexample___024root___eval_phase__nba(Vexample___024root* vlSelf) {
|
||||
if (false && vlSelf) {} // Prevent unused
|
||||
Vexample__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
|
||||
VL_DEBUG_IF(VL_DBG_MSGF("+ Vexample___024root___eval_phase__nba\n"); );
|
||||
// Init
|
||||
CData/*0:0*/ __VnbaExecute;
|
||||
// Body
|
||||
__VnbaExecute = vlSelf->__VnbaTriggered.any();
|
||||
if (__VnbaExecute) {
|
||||
Vexample___024root___eval_nba(vlSelf);
|
||||
vlSelf->__VnbaTriggered.clear();
|
||||
}
|
||||
return (__VnbaExecute);
|
||||
}
|
||||
|
||||
#ifdef VL_DEBUG
|
||||
VL_ATTR_COLD void Vexample___024root___dump_triggers__ico(Vexample___024root* vlSelf);
|
||||
#endif // VL_DEBUG
|
||||
#ifdef VL_DEBUG
|
||||
VL_ATTR_COLD void Vexample___024root___dump_triggers__nba(Vexample___024root* vlSelf);
|
||||
#endif // VL_DEBUG
|
||||
#ifdef VL_DEBUG
|
||||
VL_ATTR_COLD void Vexample___024root___dump_triggers__act(Vexample___024root* vlSelf);
|
||||
#endif // VL_DEBUG
|
||||
|
||||
void Vexample___024root___eval(Vexample___024root* vlSelf) {
|
||||
if (false && vlSelf) {} // Prevent unused
|
||||
Vexample__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
|
||||
VL_DEBUG_IF(VL_DBG_MSGF("+ Vexample___024root___eval\n"); );
|
||||
// Init
|
||||
IData/*31:0*/ __VicoIterCount;
|
||||
CData/*0:0*/ __VicoContinue;
|
||||
IData/*31:0*/ __VnbaIterCount;
|
||||
CData/*0:0*/ __VnbaContinue;
|
||||
// Body
|
||||
__VicoIterCount = 0U;
|
||||
vlSelf->__VicoFirstIteration = 1U;
|
||||
__VicoContinue = 1U;
|
||||
while (__VicoContinue) {
|
||||
if (VL_UNLIKELY((0x64U < __VicoIterCount))) {
|
||||
#ifdef VL_DEBUG
|
||||
Vexample___024root___dump_triggers__ico(vlSelf);
|
||||
#endif
|
||||
VL_FATAL_MT("vsrc/example.v", 1, "", "Input combinational region did not converge.");
|
||||
}
|
||||
__VicoIterCount = ((IData)(1U) + __VicoIterCount);
|
||||
__VicoContinue = 0U;
|
||||
if (Vexample___024root___eval_phase__ico(vlSelf)) {
|
||||
__VicoContinue = 1U;
|
||||
}
|
||||
vlSelf->__VicoFirstIteration = 0U;
|
||||
}
|
||||
__VnbaIterCount = 0U;
|
||||
__VnbaContinue = 1U;
|
||||
while (__VnbaContinue) {
|
||||
if (VL_UNLIKELY((0x64U < __VnbaIterCount))) {
|
||||
#ifdef VL_DEBUG
|
||||
Vexample___024root___dump_triggers__nba(vlSelf);
|
||||
#endif
|
||||
VL_FATAL_MT("vsrc/example.v", 1, "", "NBA region did not converge.");
|
||||
}
|
||||
__VnbaIterCount = ((IData)(1U) + __VnbaIterCount);
|
||||
__VnbaContinue = 0U;
|
||||
vlSelf->__VactIterCount = 0U;
|
||||
vlSelf->__VactContinue = 1U;
|
||||
while (vlSelf->__VactContinue) {
|
||||
if (VL_UNLIKELY((0x64U < vlSelf->__VactIterCount))) {
|
||||
#ifdef VL_DEBUG
|
||||
Vexample___024root___dump_triggers__act(vlSelf);
|
||||
#endif
|
||||
VL_FATAL_MT("vsrc/example.v", 1, "", "Active region did not converge.");
|
||||
}
|
||||
vlSelf->__VactIterCount = ((IData)(1U)
|
||||
+ vlSelf->__VactIterCount);
|
||||
vlSelf->__VactContinue = 0U;
|
||||
if (Vexample___024root___eval_phase__act(vlSelf)) {
|
||||
vlSelf->__VactContinue = 1U;
|
||||
}
|
||||
}
|
||||
if (Vexample___024root___eval_phase__nba(vlSelf)) {
|
||||
__VnbaContinue = 1U;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef VL_DEBUG
|
||||
void Vexample___024root___eval_debug_assertions(Vexample___024root* vlSelf) {
|
||||
if (false && vlSelf) {} // Prevent unused
|
||||
Vexample__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
|
||||
VL_DEBUG_IF(VL_DBG_MSGF("+ Vexample___024root___eval_debug_assertions\n"); );
|
||||
// Body
|
||||
if (VL_UNLIKELY((vlSelf->a & 0xfeU))) {
|
||||
Verilated::overWidthError("a");}
|
||||
if (VL_UNLIKELY((vlSelf->b & 0xfeU))) {
|
||||
Verilated::overWidthError("b");}
|
||||
}
|
||||
#endif // VL_DEBUG
|
||||
|
|
@ -1,149 +0,0 @@
|
|||
// Verilated -*- C++ -*-
|
||||
// DESCRIPTION: Verilator output: Design implementation internals
|
||||
// See Vexample.h for the primary calling header
|
||||
|
||||
#include "Vexample__pch.h"
|
||||
#include "Vexample___024root.h"
|
||||
|
||||
VL_ATTR_COLD void Vexample___024root___eval_static(Vexample___024root* vlSelf) {
|
||||
if (false && vlSelf) {} // Prevent unused
|
||||
Vexample__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
|
||||
VL_DEBUG_IF(VL_DBG_MSGF("+ Vexample___024root___eval_static\n"); );
|
||||
}
|
||||
|
||||
VL_ATTR_COLD void Vexample___024root___eval_initial(Vexample___024root* vlSelf) {
|
||||
if (false && vlSelf) {} // Prevent unused
|
||||
Vexample__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
|
||||
VL_DEBUG_IF(VL_DBG_MSGF("+ Vexample___024root___eval_initial\n"); );
|
||||
}
|
||||
|
||||
VL_ATTR_COLD void Vexample___024root___eval_final(Vexample___024root* vlSelf) {
|
||||
if (false && vlSelf) {} // Prevent unused
|
||||
Vexample__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
|
||||
VL_DEBUG_IF(VL_DBG_MSGF("+ Vexample___024root___eval_final\n"); );
|
||||
}
|
||||
|
||||
#ifdef VL_DEBUG
|
||||
VL_ATTR_COLD void Vexample___024root___dump_triggers__stl(Vexample___024root* vlSelf);
|
||||
#endif // VL_DEBUG
|
||||
VL_ATTR_COLD bool Vexample___024root___eval_phase__stl(Vexample___024root* vlSelf);
|
||||
|
||||
VL_ATTR_COLD void Vexample___024root___eval_settle(Vexample___024root* vlSelf) {
|
||||
if (false && vlSelf) {} // Prevent unused
|
||||
Vexample__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
|
||||
VL_DEBUG_IF(VL_DBG_MSGF("+ Vexample___024root___eval_settle\n"); );
|
||||
// Init
|
||||
IData/*31:0*/ __VstlIterCount;
|
||||
CData/*0:0*/ __VstlContinue;
|
||||
// Body
|
||||
__VstlIterCount = 0U;
|
||||
vlSelf->__VstlFirstIteration = 1U;
|
||||
__VstlContinue = 1U;
|
||||
while (__VstlContinue) {
|
||||
if (VL_UNLIKELY((0x64U < __VstlIterCount))) {
|
||||
#ifdef VL_DEBUG
|
||||
Vexample___024root___dump_triggers__stl(vlSelf);
|
||||
#endif
|
||||
VL_FATAL_MT("vsrc/example.v", 1, "", "Settle region did not converge.");
|
||||
}
|
||||
__VstlIterCount = ((IData)(1U) + __VstlIterCount);
|
||||
__VstlContinue = 0U;
|
||||
if (Vexample___024root___eval_phase__stl(vlSelf)) {
|
||||
__VstlContinue = 1U;
|
||||
}
|
||||
vlSelf->__VstlFirstIteration = 0U;
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef VL_DEBUG
|
||||
VL_ATTR_COLD void Vexample___024root___dump_triggers__stl(Vexample___024root* vlSelf) {
|
||||
if (false && vlSelf) {} // Prevent unused
|
||||
Vexample__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
|
||||
VL_DEBUG_IF(VL_DBG_MSGF("+ Vexample___024root___dump_triggers__stl\n"); );
|
||||
// Body
|
||||
if ((1U & (~ (IData)(vlSelf->__VstlTriggered.any())))) {
|
||||
VL_DBG_MSGF(" No triggers active\n");
|
||||
}
|
||||
if ((1ULL & vlSelf->__VstlTriggered.word(0U))) {
|
||||
VL_DBG_MSGF(" 'stl' region trigger index 0 is active: Internal 'stl' trigger - first iteration\n");
|
||||
}
|
||||
}
|
||||
#endif // VL_DEBUG
|
||||
|
||||
void Vexample___024root___ico_sequent__TOP__0(Vexample___024root* vlSelf);
|
||||
|
||||
VL_ATTR_COLD void Vexample___024root___eval_stl(Vexample___024root* vlSelf) {
|
||||
if (false && vlSelf) {} // Prevent unused
|
||||
Vexample__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
|
||||
VL_DEBUG_IF(VL_DBG_MSGF("+ Vexample___024root___eval_stl\n"); );
|
||||
// Body
|
||||
if ((1ULL & vlSelf->__VstlTriggered.word(0U))) {
|
||||
Vexample___024root___ico_sequent__TOP__0(vlSelf);
|
||||
}
|
||||
}
|
||||
|
||||
VL_ATTR_COLD void Vexample___024root___eval_triggers__stl(Vexample___024root* vlSelf);
|
||||
|
||||
VL_ATTR_COLD bool Vexample___024root___eval_phase__stl(Vexample___024root* vlSelf) {
|
||||
if (false && vlSelf) {} // Prevent unused
|
||||
Vexample__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
|
||||
VL_DEBUG_IF(VL_DBG_MSGF("+ Vexample___024root___eval_phase__stl\n"); );
|
||||
// Init
|
||||
CData/*0:0*/ __VstlExecute;
|
||||
// Body
|
||||
Vexample___024root___eval_triggers__stl(vlSelf);
|
||||
__VstlExecute = vlSelf->__VstlTriggered.any();
|
||||
if (__VstlExecute) {
|
||||
Vexample___024root___eval_stl(vlSelf);
|
||||
}
|
||||
return (__VstlExecute);
|
||||
}
|
||||
|
||||
#ifdef VL_DEBUG
|
||||
VL_ATTR_COLD void Vexample___024root___dump_triggers__ico(Vexample___024root* vlSelf) {
|
||||
if (false && vlSelf) {} // Prevent unused
|
||||
Vexample__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
|
||||
VL_DEBUG_IF(VL_DBG_MSGF("+ Vexample___024root___dump_triggers__ico\n"); );
|
||||
// Body
|
||||
if ((1U & (~ (IData)(vlSelf->__VicoTriggered.any())))) {
|
||||
VL_DBG_MSGF(" No triggers active\n");
|
||||
}
|
||||
if ((1ULL & vlSelf->__VicoTriggered.word(0U))) {
|
||||
VL_DBG_MSGF(" 'ico' region trigger index 0 is active: Internal 'ico' trigger - first iteration\n");
|
||||
}
|
||||
}
|
||||
#endif // VL_DEBUG
|
||||
|
||||
#ifdef VL_DEBUG
|
||||
VL_ATTR_COLD void Vexample___024root___dump_triggers__act(Vexample___024root* vlSelf) {
|
||||
if (false && vlSelf) {} // Prevent unused
|
||||
Vexample__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
|
||||
VL_DEBUG_IF(VL_DBG_MSGF("+ Vexample___024root___dump_triggers__act\n"); );
|
||||
// Body
|
||||
if ((1U & (~ (IData)(vlSelf->__VactTriggered.any())))) {
|
||||
VL_DBG_MSGF(" No triggers active\n");
|
||||
}
|
||||
}
|
||||
#endif // VL_DEBUG
|
||||
|
||||
#ifdef VL_DEBUG
|
||||
VL_ATTR_COLD void Vexample___024root___dump_triggers__nba(Vexample___024root* vlSelf) {
|
||||
if (false && vlSelf) {} // Prevent unused
|
||||
Vexample__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
|
||||
VL_DEBUG_IF(VL_DBG_MSGF("+ Vexample___024root___dump_triggers__nba\n"); );
|
||||
// Body
|
||||
if ((1U & (~ (IData)(vlSelf->__VnbaTriggered.any())))) {
|
||||
VL_DBG_MSGF(" No triggers active\n");
|
||||
}
|
||||
}
|
||||
#endif // VL_DEBUG
|
||||
|
||||
VL_ATTR_COLD void Vexample___024root___ctor_var_reset(Vexample___024root* vlSelf) {
|
||||
if (false && vlSelf) {} // Prevent unused
|
||||
Vexample__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
|
||||
VL_DEBUG_IF(VL_DBG_MSGF("+ Vexample___024root___ctor_var_reset\n"); );
|
||||
// Body
|
||||
vlSelf->a = VL_RAND_RESET_I(1);
|
||||
vlSelf->b = VL_RAND_RESET_I(1);
|
||||
vlSelf->f = VL_RAND_RESET_I(1);
|
||||
}
|
||||
|
|
@ -1,24 +0,0 @@
|
|||
// Verilated -*- C++ -*-
|
||||
// DESCRIPTION: Verilator output: Design implementation internals
|
||||
// See Vexample.h for the primary calling header
|
||||
|
||||
#include "Vexample__pch.h"
|
||||
#include "Vexample__Syms.h"
|
||||
#include "Vexample___024root.h"
|
||||
|
||||
void Vexample___024root___ctor_var_reset(Vexample___024root* vlSelf);
|
||||
|
||||
Vexample___024root::Vexample___024root(Vexample__Syms* symsp, const char* v__name)
|
||||
: VerilatedModule{v__name}
|
||||
, vlSymsp{symsp}
|
||||
{
|
||||
// Reset structure values
|
||||
Vexample___024root___ctor_var_reset(this);
|
||||
}
|
||||
|
||||
void Vexample___024root::__Vconfigure(bool first) {
|
||||
if (false && first) {} // Prevent unused
|
||||
}
|
||||
|
||||
Vexample___024root::~Vexample___024root() {
|
||||
}
|
||||
|
|
@ -1,26 +0,0 @@
|
|||
// Verilated -*- C++ -*-
|
||||
// DESCRIPTION: Verilator output: Precompiled header
|
||||
//
|
||||
// Internal details; most user sources do not need this header,
|
||||
// unless using verilator public meta comments.
|
||||
// Suggest use Vexample.h instead.
|
||||
|
||||
|
||||
#ifndef VERILATED_VEXAMPLE__PCH_H_
|
||||
#define VERILATED_VEXAMPLE__PCH_H_ // guard
|
||||
|
||||
// GCC and Clang only will precompile headers (PCH) for the first header.
|
||||
// So, make sure this is the one and only PCH.
|
||||
// If multiple module's includes are needed, use individual includes.
|
||||
#ifdef VL_PCH_INCLUDED
|
||||
# error "Including multiple precompiled header files"
|
||||
#endif
|
||||
#define VL_PCH_INCLUDED
|
||||
|
||||
|
||||
#include "verilated.h"
|
||||
|
||||
#include "Vexample__Syms.h"
|
||||
#include "Vexample.h"
|
||||
|
||||
#endif // guard
|
||||
|
|
@ -1,52 +0,0 @@
|
|||
# Verilated -*- Makefile -*-
|
||||
# DESCRIPTION: Verilator output: Make include file with class lists
|
||||
#
|
||||
# This file lists generated Verilated files, for including in higher level makefiles.
|
||||
# See Vexample.mk for the caller.
|
||||
|
||||
### Switches...
|
||||
# C11 constructs required? 0/1 (always on now)
|
||||
VM_C11 = 1
|
||||
# Timing enabled? 0/1
|
||||
VM_TIMING = 0
|
||||
# Coverage output mode? 0/1 (from --coverage)
|
||||
VM_COVERAGE = 0
|
||||
# Parallel builds? 0/1 (from --output-split)
|
||||
VM_PARALLEL_BUILDS = 0
|
||||
# Tracing output mode? 0/1 (from --trace/--trace-fst)
|
||||
VM_TRACE = 0
|
||||
# Tracing output mode in VCD format? 0/1 (from --trace)
|
||||
VM_TRACE_VCD = 0
|
||||
# Tracing output mode in FST format? 0/1 (from --trace-fst)
|
||||
VM_TRACE_FST = 0
|
||||
|
||||
### Object file lists...
|
||||
# Generated module classes, fast-path, compile with highest optimization
|
||||
VM_CLASSES_FAST += \
|
||||
Vexample \
|
||||
Vexample___024root__DepSet_h625e39dc__0 \
|
||||
Vexample___024root__DepSet_hcb5acca5__0 \
|
||||
|
||||
# Generated module classes, non-fast-path, compile with low/medium optimization
|
||||
VM_CLASSES_SLOW += \
|
||||
Vexample___024root__Slow \
|
||||
Vexample___024root__DepSet_h625e39dc__0__Slow \
|
||||
Vexample___024root__DepSet_hcb5acca5__0__Slow \
|
||||
|
||||
# Generated support classes, fast-path, compile with highest optimization
|
||||
VM_SUPPORT_FAST += \
|
||||
|
||||
# Generated support classes, non-fast-path, compile with low/medium optimization
|
||||
VM_SUPPORT_SLOW += \
|
||||
Vexample__Syms \
|
||||
|
||||
# Global classes, need linked once per executable, fast-path, compile with highest optimization
|
||||
VM_GLOBAL_FAST += \
|
||||
verilated \
|
||||
verilated_threads \
|
||||
|
||||
# Global classes, need linked once per executable, non-fast-path, compile with low/medium optimization
|
||||
VM_GLOBAL_SLOW += \
|
||||
|
||||
|
||||
# Verilated -*- Makefile -*-
|
||||
Loading…
Reference in a new issue