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> sim RTL

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ysyx_22040000 李心杨
Linux calcite 6.1.65 #1-NixOS SMP PREEMPT_DYNAMIC Sun Dec  3 06:32:13 UTC 2023 x86_64 GNU/Linux
 19:41:15  up  22:39,  2 users,  load average: 0.63, 0.51, 0.55
This commit is contained in:
tracer-ysyx 2023-12-23 19:41:15 +08:00 committed by xinyangli
parent a2204cebed
commit 8303b1d6fe
15 changed files with 3 additions and 860 deletions
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6
npc/Makefile
View file

@ -1,6 +1,6 @@
VSRC := $(wildcard vsrc/*.v)
CPPSRC := $(wildcard csrc/*.cpp)
PREFIX ?= .
CPPSRC := $(addprefix $(PWD)/,$(wildcard csrc/*.cpp))
PREFIX ?= build
OBJDIR := $(PREFIX)/obj
all: $(OBJDIR)
@ -8,7 +8,7 @@ all: $(OBJDIR)
sim: all
$(call git_commit, "sim RTL") # DO NOT REMOVE THIS LINE!!!
@echo "Write this Makefile by your self."
@echo "Running" $(OBJDIR)/Vexample
$(OBJDIR)/Vexample

105
npc/obj/Vexample.cpp
View file

@ -1,105 +0,0 @@
// Verilated -*- C++ -*-
// DESCRIPTION: Verilator output: Model implementation (design independent parts)
#include "Vexample__pch.h"
//============================================================
// Constructors
Vexample::Vexample(VerilatedContext* _vcontextp__, const char* _vcname__)
: VerilatedModel{*_vcontextp__}
, vlSymsp{new Vexample__Syms(contextp(), _vcname__, this)}
, a{vlSymsp->TOP.a}
, b{vlSymsp->TOP.b}
, f{vlSymsp->TOP.f}
, rootp{&(vlSymsp->TOP)}
{
// Register model with the context
contextp()->addModel(this);
}
Vexample::Vexample(const char* _vcname__)
: Vexample(Verilated::threadContextp(), _vcname__)
{
}
//============================================================
// Destructor
Vexample::~Vexample() {
delete vlSymsp;
}
//============================================================
// Evaluation function
#ifdef VL_DEBUG
void Vexample___024root___eval_debug_assertions(Vexample___024root* vlSelf);
#endif // VL_DEBUG
void Vexample___024root___eval_static(Vexample___024root* vlSelf);
void Vexample___024root___eval_initial(Vexample___024root* vlSelf);
void Vexample___024root___eval_settle(Vexample___024root* vlSelf);
void Vexample___024root___eval(Vexample___024root* vlSelf);
void Vexample::eval_step() {
VL_DEBUG_IF(VL_DBG_MSGF("+++++TOP Evaluate Vexample::eval_step\n"); );
#ifdef VL_DEBUG
// Debug assertions
Vexample___024root___eval_debug_assertions(&(vlSymsp->TOP));
#endif // VL_DEBUG
vlSymsp->__Vm_deleter.deleteAll();
if (VL_UNLIKELY(!vlSymsp->__Vm_didInit)) {
vlSymsp->__Vm_didInit = true;
VL_DEBUG_IF(VL_DBG_MSGF("+ Initial\n"););
Vexample___024root___eval_static(&(vlSymsp->TOP));
Vexample___024root___eval_initial(&(vlSymsp->TOP));
Vexample___024root___eval_settle(&(vlSymsp->TOP));
}
VL_DEBUG_IF(VL_DBG_MSGF("+ Eval\n"););
Vexample___024root___eval(&(vlSymsp->TOP));
// Evaluate cleanup
Verilated::endOfEval(vlSymsp->__Vm_evalMsgQp);
}
//============================================================
// Events and timing
bool Vexample::eventsPending() { return false; }
uint64_t Vexample::nextTimeSlot() {
VL_FATAL_MT(__FILE__, __LINE__, "", "%Error: No delays in the design");
return 0;
}
//============================================================
// Utilities
const char* Vexample::name() const {
return vlSymsp->name();
}
//============================================================
// Invoke final blocks
void Vexample___024root___eval_final(Vexample___024root* vlSelf);
VL_ATTR_COLD void Vexample::final() {
Vexample___024root___eval_final(&(vlSymsp->TOP));
}
//============================================================
// Implementations of abstract methods from VerilatedModel
const char* Vexample::hierName() const { return vlSymsp->name(); }
const char* Vexample::modelName() const { return "Vexample"; }
unsigned Vexample::threads() const { return 1; }
void Vexample::prepareClone() const { contextp()->prepareClone(); }
void Vexample::atClone() const {
contextp()->threadPoolpOnClone();
}
//============================================================
// Trace configuration
VL_ATTR_COLD void Vexample::trace(VerilatedVcdC* tfp, int levels, int options) {
vl_fatal(__FILE__, __LINE__, __FILE__,"'Vexample::trace()' called on model that was Verilated without --trace option");
}

83
npc/obj/Vexample.h
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@ -1,83 +0,0 @@
// Verilated -*- C++ -*-
// DESCRIPTION: Verilator output: Primary model header
//
// This header should be included by all source files instantiating the design.
// The class here is then constructed to instantiate the design.
// See the Verilator manual for examples.
#ifndef VERILATED_VEXAMPLE_H_
#define VERILATED_VEXAMPLE_H_ // guard
#include "verilated.h"
class Vexample__Syms;
class Vexample___024root;
// This class is the main interface to the Verilated model
class alignas(VL_CACHE_LINE_BYTES) Vexample VL_NOT_FINAL : public VerilatedModel {
private:
// Symbol table holding complete model state (owned by this class)
Vexample__Syms* const vlSymsp;
public:
// PORTS
// The application code writes and reads these signals to
// propagate new values into/out from the Verilated model.
VL_IN8(&a,0,0);
VL_IN8(&b,0,0);
VL_OUT8(&f,0,0);
// CELLS
// Public to allow access to /* verilator public */ items.
// Otherwise the application code can consider these internals.
// Root instance pointer to allow access to model internals,
// including inlined /* verilator public_flat_* */ items.
Vexample___024root* const rootp;
// CONSTRUCTORS
/// Construct the model; called by application code
/// If contextp is null, then the model will use the default global context
/// If name is "", then makes a wrapper with a
/// single model invisible with respect to DPI scope names.
explicit Vexample(VerilatedContext* contextp, const char* name = "TOP");
explicit Vexample(const char* name = "TOP");
/// Destroy the model; called (often implicitly) by application code
virtual ~Vexample();
private:
VL_UNCOPYABLE(Vexample); ///< Copying not allowed
public:
// API METHODS
/// Evaluate the model. Application must call when inputs change.
void eval() { eval_step(); }
/// Evaluate when calling multiple units/models per time step.
void eval_step();
/// Evaluate at end of a timestep for tracing, when using eval_step().
/// Application must call after all eval() and before time changes.
void eval_end_step() {}
/// Simulation complete, run final blocks. Application must call on completion.
void final();
/// Are there scheduled events to handle?
bool eventsPending();
/// Returns time at next time slot. Aborts if !eventsPending()
uint64_t nextTimeSlot();
/// Trace signals in the model; called by application code
void trace(VerilatedVcdC* tfp, int levels, int options = 0);
/// Retrieve name of this model instance (as passed to constructor).
const char* name() const;
// Abstract methods from VerilatedModel
const char* hierName() const override final;
const char* modelName() const override final;
unsigned threads() const override final;
/// Prepare for cloning the model at the process level (e.g. fork in Linux)
/// Release necessary resources. Called before cloning.
void prepareClone() const;
/// Re-init after cloning the model at the process level (e.g. fork in Linux)
/// Re-allocate necessary resources. Called after cloning.
void atClone() const;
};
#endif // guard

68
npc/obj/Vexample.mk
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@ -1,68 +0,0 @@
# Verilated -*- Makefile -*-
# DESCRIPTION: Verilator output: Makefile for building Verilated archive or executable
#
# Execute this makefile from the object directory:
# make -f Vexample.mk
default: Vexample
### Constants...
# Perl executable (from $PERL)
PERL = perl
# Path to Verilator kit (from $VERILATOR_ROOT)
VERILATOR_ROOT = /nix/store/lyzgj5m2zhsw9m3v1fnzr3dp1z9myyaz-verilator-5.018/share/verilator
# SystemC include directory with systemc.h (from $SYSTEMC_INCLUDE)
SYSTEMC_INCLUDE ?=
# SystemC library directory with libsystemc.a (from $SYSTEMC_LIBDIR)
SYSTEMC_LIBDIR ?=
### Switches...
# C++ code coverage 0/1 (from --prof-c)
VM_PROFC = 0
# SystemC output mode? 0/1 (from --sc)
VM_SC = 0
# Legacy or SystemC output mode? 0/1 (from --sc)
VM_SP_OR_SC = $(VM_SC)
# Deprecated
VM_PCLI = 1
# Deprecated: SystemC architecture to find link library path (from $SYSTEMC_ARCH)
VM_SC_TARGET_ARCH = linux
### Vars...
# Design prefix (from --prefix)
VM_PREFIX = Vexample
# Module prefix (from --prefix)
VM_MODPREFIX = Vexample
# User CFLAGS (from -CFLAGS on Verilator command line)
VM_USER_CFLAGS = \
# User LDLIBS (from -LDFLAGS on Verilator command line)
VM_USER_LDLIBS = \
# User .cpp files (from .cpp's on Verilator command line)
VM_USER_CLASSES = \
main \
# User .cpp directories (from .cpp's on Verilator command line)
VM_USER_DIR = \
csrc \
### Default rules...
# Include list of all generated classes
include Vexample_classes.mk
# Include global rules
include $(VERILATOR_ROOT)/include/verilated.mk
### Executable rules... (from --exe)
VPATH += $(VM_USER_DIR)
main.o: csrc/main.cpp
$(OBJCACHE) $(CXX) $(CXXFLAGS) $(CPPFLAGS) $(OPT_FAST) -c -o $@ $<
### Link rules... (from --exe)
Vexample: $(VK_USER_OBJS) $(VK_GLOBAL_OBJS) $(VM_PREFIX)__ALL.a $(VM_HIER_LIBS)
$(LINK) $(LDFLAGS) $^ $(LOADLIBES) $(LDLIBS) $(LIBS) $(SC_LIBS) -o $@
# Verilated -*- Makefile -*-

9
npc/obj/Vexample__ALL.cpp
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@ -1,9 +0,0 @@
// DESCRIPTION: Generated by verilator_includer via makefile
#define VL_INCLUDE_OPT include
#include "Vexample.cpp"
#include "Vexample___024root__DepSet_h625e39dc__0.cpp"
#include "Vexample___024root__DepSet_hcb5acca5__0.cpp"
#include "Vexample___024root__Slow.cpp"
#include "Vexample___024root__DepSet_h625e39dc__0__Slow.cpp"
#include "Vexample___024root__DepSet_hcb5acca5__0__Slow.cpp"
#include "Vexample__Syms.cpp"

26
npc/obj/Vexample__Syms.cpp
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@ -1,26 +0,0 @@
// Verilated -*- C++ -*-
// DESCRIPTION: Verilator output: Symbol table implementation internals
#include "Vexample__pch.h"
#include "Vexample.h"
#include "Vexample___024root.h"
// FUNCTIONS
Vexample__Syms::~Vexample__Syms()
{
}
Vexample__Syms::Vexample__Syms(VerilatedContext* contextp, const char* namep, Vexample* modelp)
: VerilatedSyms{contextp}
// Setup internal state of the Syms class
, __Vm_modelp{modelp}
// Setup module instances
, TOP{this, namep}
{
// Configure time unit / time precision
_vm_contextp__->timeunit(-12);
_vm_contextp__->timeprecision(-12);
// Setup each module's pointers to their submodules
// Setup each module's pointer back to symbol table (for public functions)
TOP.__Vconfigure(true);
}

38
npc/obj/Vexample__Syms.h
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@ -1,38 +0,0 @@
// Verilated -*- C++ -*-
// DESCRIPTION: Verilator output: Symbol table internal header
//
// Internal details; most calling programs do not need this header,
// unless using verilator public meta comments.
#ifndef VERILATED_VEXAMPLE__SYMS_H_
#define VERILATED_VEXAMPLE__SYMS_H_ // guard
#include "verilated.h"
// INCLUDE MODEL CLASS
#include "Vexample.h"
// INCLUDE MODULE CLASSES
#include "Vexample___024root.h"
// SYMS CLASS (contains all model state)
class alignas(VL_CACHE_LINE_BYTES)Vexample__Syms final : public VerilatedSyms {
public:
// INTERNAL STATE
Vexample* const __Vm_modelp;
VlDeleter __Vm_deleter;
bool __Vm_didInit = false;
// MODULE INSTANCE STATE
Vexample___024root TOP;
// CONSTRUCTORS
Vexample__Syms(VerilatedContext* contextp, const char* namep, Vexample* modelp);
~Vexample__Syms();
// METHODS
const char* name() { return TOP.name(); }
};
#endif // guard

42
npc/obj/Vexample___024root.h
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@ -1,42 +0,0 @@
// Verilated -*- C++ -*-
// DESCRIPTION: Verilator output: Design internal header
// See Vexample.h for the primary calling header
#ifndef VERILATED_VEXAMPLE___024ROOT_H_
#define VERILATED_VEXAMPLE___024ROOT_H_ // guard
#include "verilated.h"
class Vexample__Syms;
class alignas(VL_CACHE_LINE_BYTES) Vexample___024root final : public VerilatedModule {
public:
// DESIGN SPECIFIC STATE
VL_IN8(a,0,0);
VL_IN8(b,0,0);
VL_OUT8(f,0,0);
CData/*0:0*/ __VstlFirstIteration;
CData/*0:0*/ __VicoFirstIteration;
CData/*0:0*/ __VactContinue;
IData/*31:0*/ __VactIterCount;
VlTriggerVec<1> __VstlTriggered;
VlTriggerVec<1> __VicoTriggered;
VlTriggerVec<0> __VactTriggered;
VlTriggerVec<0> __VnbaTriggered;
// INTERNAL VARIABLES
Vexample__Syms* const vlSymsp;
// CONSTRUCTORS
Vexample___024root(Vexample__Syms* symsp, const char* v__name);
~Vexample___024root();
VL_UNCOPYABLE(Vexample___024root);
// INTERNAL METHODS
void __Vconfigure(bool first);
};
#endif // guard

40
npc/obj/Vexample___024root__DepSet_h625e39dc__0.cpp
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@ -1,40 +0,0 @@
// Verilated -*- C++ -*-
// DESCRIPTION: Verilator output: Design implementation internals
// See Vexample.h for the primary calling header
#include "Vexample__pch.h"
#include "Vexample__Syms.h"
#include "Vexample___024root.h"
#ifdef VL_DEBUG
VL_ATTR_COLD void Vexample___024root___dump_triggers__ico(Vexample___024root* vlSelf);
#endif // VL_DEBUG
void Vexample___024root___eval_triggers__ico(Vexample___024root* vlSelf) {
if (false && vlSelf) {} // Prevent unused
Vexample__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
VL_DEBUG_IF(VL_DBG_MSGF("+ Vexample___024root___eval_triggers__ico\n"); );
// Body
vlSelf->__VicoTriggered.set(0U, (IData)(vlSelf->__VicoFirstIteration));
#ifdef VL_DEBUG
if (VL_UNLIKELY(vlSymsp->_vm_contextp__->debug())) {
Vexample___024root___dump_triggers__ico(vlSelf);
}
#endif
}
#ifdef VL_DEBUG
VL_ATTR_COLD void Vexample___024root___dump_triggers__act(Vexample___024root* vlSelf);
#endif // VL_DEBUG
void Vexample___024root___eval_triggers__act(Vexample___024root* vlSelf) {
if (false && vlSelf) {} // Prevent unused
Vexample__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
VL_DEBUG_IF(VL_DBG_MSGF("+ Vexample___024root___eval_triggers__act\n"); );
// Body
#ifdef VL_DEBUG
if (VL_UNLIKELY(vlSymsp->_vm_contextp__->debug())) {
Vexample___024root___dump_triggers__act(vlSelf);
}
#endif
}

24
npc/obj/Vexample___024root__DepSet_h625e39dc__0__Slow.cpp
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@ -1,24 +0,0 @@
// Verilated -*- C++ -*-
// DESCRIPTION: Verilator output: Design implementation internals
// See Vexample.h for the primary calling header
#include "Vexample__pch.h"
#include "Vexample__Syms.h"
#include "Vexample___024root.h"
#ifdef VL_DEBUG
VL_ATTR_COLD void Vexample___024root___dump_triggers__stl(Vexample___024root* vlSelf);
#endif // VL_DEBUG
VL_ATTR_COLD void Vexample___024root___eval_triggers__stl(Vexample___024root* vlSelf) {
if (false && vlSelf) {} // Prevent unused
Vexample__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
VL_DEBUG_IF(VL_DBG_MSGF("+ Vexample___024root___eval_triggers__stl\n"); );
// Body
vlSelf->__VstlTriggered.set(0U, (IData)(vlSelf->__VstlFirstIteration));
#ifdef VL_DEBUG
if (VL_UNLIKELY(vlSymsp->_vm_contextp__->debug())) {
Vexample___024root___dump_triggers__stl(vlSelf);
}
#endif
}

171
npc/obj/Vexample___024root__DepSet_hcb5acca5__0.cpp
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@ -1,171 +0,0 @@
// Verilated -*- C++ -*-
// DESCRIPTION: Verilator output: Design implementation internals
// See Vexample.h for the primary calling header
#include "Vexample__pch.h"
#include "Vexample___024root.h"
VL_INLINE_OPT void Vexample___024root___ico_sequent__TOP__0(Vexample___024root* vlSelf) {
if (false && vlSelf) {} // Prevent unused
Vexample__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
VL_DEBUG_IF(VL_DBG_MSGF("+ Vexample___024root___ico_sequent__TOP__0\n"); );
// Body
vlSelf->f = ((IData)(vlSelf->a) ^ (IData)(vlSelf->b));
}
void Vexample___024root___eval_ico(Vexample___024root* vlSelf) {
if (false && vlSelf) {} // Prevent unused
Vexample__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
VL_DEBUG_IF(VL_DBG_MSGF("+ Vexample___024root___eval_ico\n"); );
// Body
if ((1ULL & vlSelf->__VicoTriggered.word(0U))) {
Vexample___024root___ico_sequent__TOP__0(vlSelf);
}
}
void Vexample___024root___eval_triggers__ico(Vexample___024root* vlSelf);
bool Vexample___024root___eval_phase__ico(Vexample___024root* vlSelf) {
if (false && vlSelf) {} // Prevent unused
Vexample__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
VL_DEBUG_IF(VL_DBG_MSGF("+ Vexample___024root___eval_phase__ico\n"); );
// Init
CData/*0:0*/ __VicoExecute;
// Body
Vexample___024root___eval_triggers__ico(vlSelf);
__VicoExecute = vlSelf->__VicoTriggered.any();
if (__VicoExecute) {
Vexample___024root___eval_ico(vlSelf);
}
return (__VicoExecute);
}
void Vexample___024root___eval_act(Vexample___024root* vlSelf) {
if (false && vlSelf) {} // Prevent unused
Vexample__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
VL_DEBUG_IF(VL_DBG_MSGF("+ Vexample___024root___eval_act\n"); );
}
void Vexample___024root___eval_nba(Vexample___024root* vlSelf) {
if (false && vlSelf) {} // Prevent unused
Vexample__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
VL_DEBUG_IF(VL_DBG_MSGF("+ Vexample___024root___eval_nba\n"); );
}
void Vexample___024root___eval_triggers__act(Vexample___024root* vlSelf);
bool Vexample___024root___eval_phase__act(Vexample___024root* vlSelf) {
if (false && vlSelf) {} // Prevent unused
Vexample__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
VL_DEBUG_IF(VL_DBG_MSGF("+ Vexample___024root___eval_phase__act\n"); );
// Init
VlTriggerVec<0> __VpreTriggered;
CData/*0:0*/ __VactExecute;
// Body
Vexample___024root___eval_triggers__act(vlSelf);
__VactExecute = vlSelf->__VactTriggered.any();
if (__VactExecute) {
__VpreTriggered.andNot(vlSelf->__VactTriggered, vlSelf->__VnbaTriggered);
vlSelf->__VnbaTriggered.thisOr(vlSelf->__VactTriggered);
Vexample___024root___eval_act(vlSelf);
}
return (__VactExecute);
}
bool Vexample___024root___eval_phase__nba(Vexample___024root* vlSelf) {
if (false && vlSelf) {} // Prevent unused
Vexample__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
VL_DEBUG_IF(VL_DBG_MSGF("+ Vexample___024root___eval_phase__nba\n"); );
// Init
CData/*0:0*/ __VnbaExecute;
// Body
__VnbaExecute = vlSelf->__VnbaTriggered.any();
if (__VnbaExecute) {
Vexample___024root___eval_nba(vlSelf);
vlSelf->__VnbaTriggered.clear();
}
return (__VnbaExecute);
}
#ifdef VL_DEBUG
VL_ATTR_COLD void Vexample___024root___dump_triggers__ico(Vexample___024root* vlSelf);
#endif // VL_DEBUG
#ifdef VL_DEBUG
VL_ATTR_COLD void Vexample___024root___dump_triggers__nba(Vexample___024root* vlSelf);
#endif // VL_DEBUG
#ifdef VL_DEBUG
VL_ATTR_COLD void Vexample___024root___dump_triggers__act(Vexample___024root* vlSelf);
#endif // VL_DEBUG
void Vexample___024root___eval(Vexample___024root* vlSelf) {
if (false && vlSelf) {} // Prevent unused
Vexample__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
VL_DEBUG_IF(VL_DBG_MSGF("+ Vexample___024root___eval\n"); );
// Init
IData/*31:0*/ __VicoIterCount;
CData/*0:0*/ __VicoContinue;
IData/*31:0*/ __VnbaIterCount;
CData/*0:0*/ __VnbaContinue;
// Body
__VicoIterCount = 0U;
vlSelf->__VicoFirstIteration = 1U;
__VicoContinue = 1U;
while (__VicoContinue) {
if (VL_UNLIKELY((0x64U < __VicoIterCount))) {
#ifdef VL_DEBUG
Vexample___024root___dump_triggers__ico(vlSelf);
#endif
VL_FATAL_MT("vsrc/example.v", 1, "", "Input combinational region did not converge.");
}
__VicoIterCount = ((IData)(1U) + __VicoIterCount);
__VicoContinue = 0U;
if (Vexample___024root___eval_phase__ico(vlSelf)) {
__VicoContinue = 1U;
}
vlSelf->__VicoFirstIteration = 0U;
}
__VnbaIterCount = 0U;
__VnbaContinue = 1U;
while (__VnbaContinue) {
if (VL_UNLIKELY((0x64U < __VnbaIterCount))) {
#ifdef VL_DEBUG
Vexample___024root___dump_triggers__nba(vlSelf);
#endif
VL_FATAL_MT("vsrc/example.v", 1, "", "NBA region did not converge.");
}
__VnbaIterCount = ((IData)(1U) + __VnbaIterCount);
__VnbaContinue = 0U;
vlSelf->__VactIterCount = 0U;
vlSelf->__VactContinue = 1U;
while (vlSelf->__VactContinue) {
if (VL_UNLIKELY((0x64U < vlSelf->__VactIterCount))) {
#ifdef VL_DEBUG
Vexample___024root___dump_triggers__act(vlSelf);
#endif
VL_FATAL_MT("vsrc/example.v", 1, "", "Active region did not converge.");
}
vlSelf->__VactIterCount = ((IData)(1U)
+ vlSelf->__VactIterCount);
vlSelf->__VactContinue = 0U;
if (Vexample___024root___eval_phase__act(vlSelf)) {
vlSelf->__VactContinue = 1U;
}
}
if (Vexample___024root___eval_phase__nba(vlSelf)) {
__VnbaContinue = 1U;
}
}
}
#ifdef VL_DEBUG
void Vexample___024root___eval_debug_assertions(Vexample___024root* vlSelf) {
if (false && vlSelf) {} // Prevent unused
Vexample__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
VL_DEBUG_IF(VL_DBG_MSGF("+ Vexample___024root___eval_debug_assertions\n"); );
// Body
if (VL_UNLIKELY((vlSelf->a & 0xfeU))) {
Verilated::overWidthError("a");}
if (VL_UNLIKELY((vlSelf->b & 0xfeU))) {
Verilated::overWidthError("b");}
}
#endif // VL_DEBUG

149
npc/obj/Vexample___024root__DepSet_hcb5acca5__0__Slow.cpp
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@ -1,149 +0,0 @@
// Verilated -*- C++ -*-
// DESCRIPTION: Verilator output: Design implementation internals
// See Vexample.h for the primary calling header
#include "Vexample__pch.h"
#include "Vexample___024root.h"
VL_ATTR_COLD void Vexample___024root___eval_static(Vexample___024root* vlSelf) {
if (false && vlSelf) {} // Prevent unused
Vexample__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
VL_DEBUG_IF(VL_DBG_MSGF("+ Vexample___024root___eval_static\n"); );
}
VL_ATTR_COLD void Vexample___024root___eval_initial(Vexample___024root* vlSelf) {
if (false && vlSelf) {} // Prevent unused
Vexample__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
VL_DEBUG_IF(VL_DBG_MSGF("+ Vexample___024root___eval_initial\n"); );
}
VL_ATTR_COLD void Vexample___024root___eval_final(Vexample___024root* vlSelf) {
if (false && vlSelf) {} // Prevent unused
Vexample__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
VL_DEBUG_IF(VL_DBG_MSGF("+ Vexample___024root___eval_final\n"); );
}
#ifdef VL_DEBUG
VL_ATTR_COLD void Vexample___024root___dump_triggers__stl(Vexample___024root* vlSelf);
#endif // VL_DEBUG
VL_ATTR_COLD bool Vexample___024root___eval_phase__stl(Vexample___024root* vlSelf);
VL_ATTR_COLD void Vexample___024root___eval_settle(Vexample___024root* vlSelf) {
if (false && vlSelf) {} // Prevent unused
Vexample__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
VL_DEBUG_IF(VL_DBG_MSGF("+ Vexample___024root___eval_settle\n"); );
// Init
IData/*31:0*/ __VstlIterCount;
CData/*0:0*/ __VstlContinue;
// Body
__VstlIterCount = 0U;
vlSelf->__VstlFirstIteration = 1U;
__VstlContinue = 1U;
while (__VstlContinue) {
if (VL_UNLIKELY((0x64U < __VstlIterCount))) {
#ifdef VL_DEBUG
Vexample___024root___dump_triggers__stl(vlSelf);
#endif
VL_FATAL_MT("vsrc/example.v", 1, "", "Settle region did not converge.");
}
__VstlIterCount = ((IData)(1U) + __VstlIterCount);
__VstlContinue = 0U;
if (Vexample___024root___eval_phase__stl(vlSelf)) {
__VstlContinue = 1U;
}
vlSelf->__VstlFirstIteration = 0U;
}
}
#ifdef VL_DEBUG
VL_ATTR_COLD void Vexample___024root___dump_triggers__stl(Vexample___024root* vlSelf) {
if (false && vlSelf) {} // Prevent unused
Vexample__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
VL_DEBUG_IF(VL_DBG_MSGF("+ Vexample___024root___dump_triggers__stl\n"); );
// Body
if ((1U & (~ (IData)(vlSelf->__VstlTriggered.any())))) {
VL_DBG_MSGF(" No triggers active\n");
}
if ((1ULL & vlSelf->__VstlTriggered.word(0U))) {
VL_DBG_MSGF(" 'stl' region trigger index 0 is active: Internal 'stl' trigger - first iteration\n");
}
}
#endif // VL_DEBUG
void Vexample___024root___ico_sequent__TOP__0(Vexample___024root* vlSelf);
VL_ATTR_COLD void Vexample___024root___eval_stl(Vexample___024root* vlSelf) {
if (false && vlSelf) {} // Prevent unused
Vexample__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
VL_DEBUG_IF(VL_DBG_MSGF("+ Vexample___024root___eval_stl\n"); );
// Body
if ((1ULL & vlSelf->__VstlTriggered.word(0U))) {
Vexample___024root___ico_sequent__TOP__0(vlSelf);
}
}
VL_ATTR_COLD void Vexample___024root___eval_triggers__stl(Vexample___024root* vlSelf);
VL_ATTR_COLD bool Vexample___024root___eval_phase__stl(Vexample___024root* vlSelf) {
if (false && vlSelf) {} // Prevent unused
Vexample__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
VL_DEBUG_IF(VL_DBG_MSGF("+ Vexample___024root___eval_phase__stl\n"); );
// Init
CData/*0:0*/ __VstlExecute;
// Body
Vexample___024root___eval_triggers__stl(vlSelf);
__VstlExecute = vlSelf->__VstlTriggered.any();
if (__VstlExecute) {
Vexample___024root___eval_stl(vlSelf);
}
return (__VstlExecute);
}
#ifdef VL_DEBUG
VL_ATTR_COLD void Vexample___024root___dump_triggers__ico(Vexample___024root* vlSelf) {
if (false && vlSelf) {} // Prevent unused
Vexample__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
VL_DEBUG_IF(VL_DBG_MSGF("+ Vexample___024root___dump_triggers__ico\n"); );
// Body
if ((1U & (~ (IData)(vlSelf->__VicoTriggered.any())))) {
VL_DBG_MSGF(" No triggers active\n");
}
if ((1ULL & vlSelf->__VicoTriggered.word(0U))) {
VL_DBG_MSGF(" 'ico' region trigger index 0 is active: Internal 'ico' trigger - first iteration\n");
}
}
#endif // VL_DEBUG
#ifdef VL_DEBUG
VL_ATTR_COLD void Vexample___024root___dump_triggers__act(Vexample___024root* vlSelf) {
if (false && vlSelf) {} // Prevent unused
Vexample__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
VL_DEBUG_IF(VL_DBG_MSGF("+ Vexample___024root___dump_triggers__act\n"); );
// Body
if ((1U & (~ (IData)(vlSelf->__VactTriggered.any())))) {
VL_DBG_MSGF(" No triggers active\n");
}
}
#endif // VL_DEBUG
#ifdef VL_DEBUG
VL_ATTR_COLD void Vexample___024root___dump_triggers__nba(Vexample___024root* vlSelf) {
if (false && vlSelf) {} // Prevent unused
Vexample__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
VL_DEBUG_IF(VL_DBG_MSGF("+ Vexample___024root___dump_triggers__nba\n"); );
// Body
if ((1U & (~ (IData)(vlSelf->__VnbaTriggered.any())))) {
VL_DBG_MSGF(" No triggers active\n");
}
}
#endif // VL_DEBUG
VL_ATTR_COLD void Vexample___024root___ctor_var_reset(Vexample___024root* vlSelf) {
if (false && vlSelf) {} // Prevent unused
Vexample__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
VL_DEBUG_IF(VL_DBG_MSGF("+ Vexample___024root___ctor_var_reset\n"); );
// Body
vlSelf->a = VL_RAND_RESET_I(1);
vlSelf->b = VL_RAND_RESET_I(1);
vlSelf->f = VL_RAND_RESET_I(1);
}

24
npc/obj/Vexample___024root__Slow.cpp
View file

@ -1,24 +0,0 @@
// Verilated -*- C++ -*-
// DESCRIPTION: Verilator output: Design implementation internals
// See Vexample.h for the primary calling header
#include "Vexample__pch.h"
#include "Vexample__Syms.h"
#include "Vexample___024root.h"
void Vexample___024root___ctor_var_reset(Vexample___024root* vlSelf);
Vexample___024root::Vexample___024root(Vexample__Syms* symsp, const char* v__name)
: VerilatedModule{v__name}
, vlSymsp{symsp}
{
// Reset structure values
Vexample___024root___ctor_var_reset(this);
}
void Vexample___024root::__Vconfigure(bool first) {
if (false && first) {} // Prevent unused
}
Vexample___024root::~Vexample___024root() {
}

26
npc/obj/Vexample__pch.h
View file

@ -1,26 +0,0 @@
// Verilated -*- C++ -*-
// DESCRIPTION: Verilator output: Precompiled header
//
// Internal details; most user sources do not need this header,
// unless using verilator public meta comments.
// Suggest use Vexample.h instead.
#ifndef VERILATED_VEXAMPLE__PCH_H_
#define VERILATED_VEXAMPLE__PCH_H_ // guard
// GCC and Clang only will precompile headers (PCH) for the first header.
// So, make sure this is the one and only PCH.
// If multiple module's includes are needed, use individual includes.
#ifdef VL_PCH_INCLUDED
# error "Including multiple precompiled header files"
#endif
#define VL_PCH_INCLUDED
#include "verilated.h"
#include "Vexample__Syms.h"
#include "Vexample.h"
#endif // guard

52
npc/obj/Vexample_classes.mk
View file

@ -1,52 +0,0 @@
# Verilated -*- Makefile -*-
# DESCRIPTION: Verilator output: Make include file with class lists
#
# This file lists generated Verilated files, for including in higher level makefiles.
# See Vexample.mk for the caller.
### Switches...
# C11 constructs required? 0/1 (always on now)
VM_C11 = 1
# Timing enabled? 0/1
VM_TIMING = 0
# Coverage output mode? 0/1 (from --coverage)
VM_COVERAGE = 0
# Parallel builds? 0/1 (from --output-split)
VM_PARALLEL_BUILDS = 0
# Tracing output mode? 0/1 (from --trace/--trace-fst)
VM_TRACE = 0
# Tracing output mode in VCD format? 0/1 (from --trace)
VM_TRACE_VCD = 0
# Tracing output mode in FST format? 0/1 (from --trace-fst)
VM_TRACE_FST = 0
### Object file lists...
# Generated module classes, fast-path, compile with highest optimization
VM_CLASSES_FAST += \
Vexample \
Vexample___024root__DepSet_h625e39dc__0 \
Vexample___024root__DepSet_hcb5acca5__0 \
# Generated module classes, non-fast-path, compile with low/medium optimization
VM_CLASSES_SLOW += \
Vexample___024root__Slow \
Vexample___024root__DepSet_h625e39dc__0__Slow \
Vexample___024root__DepSet_hcb5acca5__0__Slow \
# Generated support classes, fast-path, compile with highest optimization
VM_SUPPORT_FAST += \
# Generated support classes, non-fast-path, compile with low/medium optimization
VM_SUPPORT_SLOW += \
Vexample__Syms \
# Global classes, need linked once per executable, fast-path, compile with highest optimization
VM_GLOBAL_FAST += \
verilated \
verilated_threads \
# Global classes, need linked once per executable, non-fast-path, compile with low/medium optimization
VM_GLOBAL_SLOW += \
# Verilated -*- Makefile -*-