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> sim RTL

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ysyx_22040000 李心杨
Linux calcite 6.1.69 #1-NixOS SMP PREEMPT_DYNAMIC Wed Dec 20 16:00:29 UTC 2023 x86_64 GNU/Linux
 14:10:45  up  22:49,  2 users,  load average: 1.05, 0.80, 0.80
This commit is contained in:
tracer-ysyx 2024-01-01 14:10:45 +08:00 committed by xinyangli
parent 1a6f02c20a
commit 7b9dbca4b4
1 changed files with 8 additions and 8 deletions
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16
npc/Makefile
View file

@ -4,9 +4,7 @@ OBJDIR := $(PREFIX)/obj
TARGET := $(OBJDIR)/Vexample
VSRC := $(wildcard vsrc/*.v)
SRC_AUTO_BIND := $(abspath $(PREFIX)/auto_bind.cpp)
CPPSRCS := $(addprefix $(PWD)/,$(wildcard csrc/*.cpp))
NXDC_FILES = $(abspath constr/top.nxdc)
SUBMAKE := $(OBJDIR)/Vexample.mk
VERILATOR_FLAGS := --cc --exe
@ -23,9 +21,6 @@ sim: $(VSRC) $(CPPSRCS) $(OBJDIR)/Vexample git_trace
$(OBJDIR)/Vexample: $(SUBMAKE)
$(MAKE) -C $(OBJDIR) -f $(notdir $(SUBMAKE)) Vexample
$(PREFIX)/nvobj/Vexample: $(SUBMAKE)
$(MAKE) -C $(OBJDIR) -f $(notdir $(SUBMAKE)) Vexample
$(SUBMAKE): $(VSRC) $(CPPSRCS)
mkdir -p $(OBJDIR)
verilator $(VERILATOR_FLAGS) $(addprefix -CFLAGS , $(CXXFLAGS)) $(addprefix -LDFLAGS , $(LDFLAGS)) --Mdir $(abspath $(OBJDIR)) $(VSRC) $(CPPSRCS)
@ -43,14 +38,19 @@ endif
git_trace:
$(call git_commit, "sim RTL")
.PHONY: clean nvboard
# TODO: fix this awkward way to find nvboard.a
nvboard: OBJDIR := $(PREFIX)/nvobj
nvboard: SUBMAKE := $(OBJDIR)/Vexample.mk
nvboard: NXDC_FILES = $(abspath constr/top.nxdc)
nvboard: SRC_AUTO_BIND := $(abspath $(PREFIX)/auto_bind.cpp)
# TODO: fix this awkward way to find nvboard.a
nvboard: CPPSRCS := $(addprefix $(PWD)/,$(wildcard csrc_nvboard/*.cpp)) $(SRC_AUTO_BIND) $(NVBOARD_HOME)/build/nvboard.a
nvboard: CXXFLAGS += -I$(NVBOARD_HOME)/include $(shell sdl2-config --cflags) -g
nvboard: $(VSRC) $(CPPSRCS) $(PREFIX)/nvobj/Vexample $(SUBMAKE) $(SRC_AUTO_BIND)
nvboard: $(VSRC) $(CPPSRCS) $(SUBMAKE) $(SRC_AUTO_BIND) $(OBJDIR)/Vexample
@NVBOARD_HOME=$(NVBOARD_HOME) $(OBJDIR)/Vexample
clean: