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> configure(npc)

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ysyx_22040000 李心杨
 Linux calcite 6.6.19 #1-NixOS SMP PREEMPT_DYNAMIC Fri Mar  1 12:35:11 UTC 2024 x86_64 GNU/Linux
  11:41:47  up   1:17,  2 users,  load average: 0.84, 0.92, 0.82
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tracer-ysyx 2024-03-13 11:41:47 +08:00 committed by xinyangli
parent 110d8d5288
commit 718f180414
1 changed files with 1 additions and 1 deletions
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2
npc/core/src/main/scala/Main.scala
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@ -50,7 +50,6 @@ class Control(width: Int) extends Module {
// writeEnable :: writeSelect :: srcSelect :: // writeEnable :: writeSelect :: srcSelect ::
(addi, true.B :: rAluOut :: pStaticNpc :: aOpAdd :: aSrcImm :: HNil), (addi, true.B :: rAluOut :: pStaticNpc :: aOpAdd :: aSrcImm :: HNil),
) )
println(ControlMapping)
def toBits(t: T): BitPat = { def toBits(t: T): BitPat = {
val list: List[Data] = t.toList val list: List[Data] = t.toList
list.map(x => BitPat(x.litValue.toInt.U(x.getWidth.W))).reduceLeft(_ ## _) list.map(x => BitPat(x.litValue.toInt.U(x.getWidth.W))).reduceLeft(_ ## _)
@ -66,6 +65,7 @@ class Control(width: Int) extends Module {
val out = decoder( val out = decoder(
inst, inst,
TruthTable(ControlMapping.map(it => (it._1 -> toBits(it._2))), default)) TruthTable(ControlMapping.map(it => (it._1 -> toBits(it._2))), default))
println(out)
val dstList = dst.toList val dstList = dst.toList
val reversePrefixSum = dstList.scanLeft(0)(_ + _.getWidth).reverse val reversePrefixSum = dstList.scanLeft(0)(_ + _.getWidth).reverse