> sim RTL

ysyx_22040000 李心杨
Linux calcite 6.1.65 #1-NixOS SMP PREEMPT_DYNAMIC Sun Dec  3 06:32:13 UTC 2023 x86_64 GNU/Linux
 20:20:35  up  23:18,  2 users,  load average: 0.39, 0.32, 0.44
This commit is contained in:
tracer-ysyx 2023-12-23 20:20:35 +08:00 committed by xinyangli
parent 1d8692714e
commit 5ab7080342

View file

@ -14,6 +14,9 @@ sim: $(VSRC) $(CPPSRC) $(SUBMAKE)
@echo "================================" @echo "================================"
@$(OBJDIR)/Vexample @$(OBJDIR)/Vexample
$(OBJDIR)/Vexample: $(SUBMAKE)
make -C $(OBJDIR) -f $(notdir $(SUBMAKE)) Vexample
$(SUBMAKE): $(VSRC) $(CPPSRC) $(OBJDIR) $(SUBMAKE): $(VSRC) $(CPPSRC) $(OBJDIR)
verilator $(VERILATOR_FLAGS) --Mdir $(PWD)/$(OBJDIR) $(VSRC) $(CPPSRC) verilator $(VERILATOR_FLAGS) --Mdir $(PWD)/$(OBJDIR) $(VSRC) $(CPPSRC)