> nvboard

ysyx_22040000 李心杨
Linux calcite 6.1.69 #1-NixOS SMP PREEMPT_DYNAMIC Wed Dec 20 16:00:29 UTC 2023 x86_64 GNU/Linux
 17:26:20  up   2:12,  2 users,  load average: 0.63, 1.11, 1.07
This commit is contained in:
tracer-ysyx 2024-01-04 17:26:20 +08:00 committed by xinyangli
parent 5a23c53fff
commit 5810984cbb

View file

@ -4,7 +4,6 @@ OBJDIR := $(PREFIX)/obj
CHISEL_VDIR := $(PREFIX)/chisel
CPPSRCS := $(addprefix $(PWD)/,$(wildcard csrc/*.cpp))
SUBMAKE = $(OBJDIR)/V$(CHISEL_TOP_MODULE).mk
VERILATOR_FLAGS := --cc --exe
LDFLAGS += $(shell sdl2-config --libs) -lSDL2_image
@ -13,6 +12,8 @@ CHISEL_TOP_PACKAGE := learning
CHISEL_TOP_MODULE := Main
CHISEL_TARGET := verilog
SUBMAKE := $(OBJDIR)/V$(CHISEL_TOP_MODULE).mk
# Pretty printing
MAKEFLAGS += --no-print-directory
GREEN=\e[32m
@ -28,14 +29,6 @@ NXDC_FILES := $(abspath constr/top.nxdc)
$(SRC_AUTO_BIND): $(NXDC_FILES)
NVBOARD_HOME=$(NVBOARD_HOME) python3 $(NVBOARD_HOME)/scripts/auto_pin_bind.py $< $@
nvboard-bin: OBJDIR = $(PREFIX)/nvobj
nvboard-bin: SUBMAKE = $(OBJDIR)/V$(CHISEL_TOP_MODULE).mk
# TODO: fix this awkward way to find nvboard.a
nvboard-bin: CPPSRCS = $(addprefix $(PWD)/,$(wildcard csrc_nvboard/*.cpp)) $(SRC_AUTO_BIND) $(NVBOARD_HOME)/build/nvboard.a
nvboard-bin: CXXFLAGS += -I$(NVBOARD_HOME)/include $(shell sdl2-config --cflags) -g
nvboard-bin: $(CPPSRCS) $(SUBMAKE) $(SRC_AUTO_BIND) $(OBJDIR)/V$(CHISEL_TOP_MODULE)
$(OBJDIR)/V$(CHISEL_TOP_MODULE): $(SUBMAKE)
@$(call colorize,"SUBMAKE",$^)
$(MAKE) -s -C $(OBJDIR) -f $(notdir $(SUBMAKE)) V$(CHISEL_TOP_MODULE)
@ -59,6 +52,14 @@ compile_commands.json: clean
.PHONY: clean nvboard sim nvboard-bin sim-bin git_trace_sim git_trace_nvboard
nvboard-bin: OBJDIR := $(PREFIX)/nvobj
nvboard-bin: SUBMAKE := $(OBJDIR)/V$(CHISEL_TOP_MODULE).mk
# TODO: fix this awkward way to find nvboard.a
nvboard-bin: CPPSRCS := $(addprefix $(PWD)/,$(wildcard csrc_nvboard/*.cpp)) $(SRC_AUTO_BIND) $(NVBOARD_HOME)/build/nvboard.a
nvboard-bin: CXXFLAGS += -I$(NVBOARD_HOME)/include $(shell sdl2-config --cflags) -g
nvboard-bin: $(CPPSRCS) $(SUBMAKE) $(SRC_AUTO_BIND) $(OBJDIR)/V$(CHISEL_TOP_MODULE)
sim-bin: VERILATOR_FLAGS += --trace
sim-bin: $(CPPSRCS) $(OBJDIR)/V$(CHISEL_TOP_MODULE)