xin/ysyx-workbench
1
0
Fork 0
Code Issues Pull requests 1 Projects Releases Packages Wiki Activity Actions

> compile NEMU

Browse source 
ysyx_22040000 李心杨
Linux calcite 6.6.18 #1-NixOS SMP PREEMPT_DYNAMIC Fri Feb 23 08:25:28 UTC 2024 x86_64 GNU/Linux
 22:55:01  up 1 day  2:23,  2 users,  load average: 1.05, 0.63, 0.33
This commit is contained in:
tracer-ysyx 2024-03-05 22:55:01 +08:00 committed by xinyangli
parent b564f649f2
commit 468558417f
1 changed files with 2 additions and 1 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

3
nemu/src/isa/riscv32/inst.c
View file

@ -33,7 +33,7 @@ enum {
#define immI() do { *imm = SEXT(BITS(i, 31, 20), 12); } while(0) #define immI() do { *imm = SEXT(BITS(i, 31, 20), 12); } while(0)
#define immU() do { *imm = SEXT(BITS(i, 31, 12), 20) << 12; } while(0) #define immU() do { *imm = SEXT(BITS(i, 31, 12), 20) << 12; } while(0)
#define immS() do { *imm = (SEXT(BITS(i, 31, 25), 7) << 5) | BITS(i, 11, 7); } while(0) #define immS() do { *imm = (SEXT(BITS(i, 31, 25), 7) << 5) | BITS(i, 11, 7); } while(0)
#define immB() do { *imm = (SEXT(BITS(i, 31, 31), 1) << 12 | BITS(i, 30, 25) << 5 | BITS(i, 11, 8) << 1 | BITS(i, 8, 8) << 11; } while(0) #define immB() do { *imm = (SEXT(BITS(i, 31, 31), 1) << 12 | BITS(i, 30, 25) << 5 | BITS(i, 11, 8) << 1 | BITS(i, 8, 8) << 11); } while(0)
#define immJ() do { *imm = (SEXT(BITS(i, 31, 31), 1) << 20) | BITS(i, 30, 21) << 1 | BITS(i, 20, 20) << 11 | BITS(i, 19, 12) << 12; } while(0) #define immJ() do { *imm = (SEXT(BITS(i, 31, 31), 1) << 20) | BITS(i, 30, 21) << 1 | BITS(i, 20, 20) << 11 | BITS(i, 19, 12) << 12; } while(0)
static void decode_operand(Decode *s, int *rd, word_t *src1, word_t *src2, word_t *imm, int type) { static void decode_operand(Decode *s, int *rd, word_t *src1, word_t *src2, word_t *imm, int type) {
@ -47,6 +47,7 @@ static void decode_operand(Decode *s, int *rd, word_t *src1, word_t *src2, word_
case TYPE_U: immU(); break; case TYPE_U: immU(); break;
case TYPE_J: immJ(); break; case TYPE_J: immJ(); break;
case TYPE_S: src1R(); src2R(); immS(); break; case TYPE_S: src1R(); src2R(); immS(); break;
case TYPE_B: src1R(); src2R(); immB(); break;
} }
} }