> configure(npc)

ysyx_22040000 李心杨
 Linux calcite 6.1.69 #1-NixOS SMP PREEMPT_DYNAMIC Wed Dec 20 16:00:29 UTC 2023 x86_64 GNU/Linux
  17:10:11  up 2 days 16:10,  2 users,  load average: 0.52, 0.61, 0.56
This commit is contained in:
tracer-ysyx 2024-01-10 17:10:11 +08:00 committed by xinyangli
parent c03db677e8
commit 34c3b29d2d
No known key found for this signature in database
5 changed files with 17 additions and 11 deletions

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@ -49,7 +49,7 @@ add_custom_command(
DEPENDS ${CMAKE_SOURCE_DIR}/constr/${TOPMODULE}.nxdc DEPENDS ${CMAKE_SOURCE_DIR}/constr/${TOPMODULE}.nxdc
) )
add_executable(V${TOPMODULE}_nvboard csrc_nvboard/main.cpp auto_bind.cpp) add_executable(V${TOPMODULE}_nvboard csrc_nvboard/${TOPMODULE}/main.cpp auto_bind.cpp)
verilate(V${TOPMODULE}_nvboard TRACE COVERAGE THREADS verilate(V${TOPMODULE}_nvboard TRACE COVERAGE THREADS
TOP_MODULE ${TOPMODULE} TOP_MODULE ${TOPMODULE}

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@ -1,6 +1,7 @@
top=Keyboard top=Keyboard
io_keycode_bits (SW7, SW6, SW5, SW4, SW3, SW2, SW1, SW0) io_ps2_clk PS2_CLK
io_ps2_data PS2_DAT
io_segs_0 (SEG0A, SEG0B, SEG0C, SEG0D, SEG0E, SEG0F, SEG0G, DEC0P) io_segs_0 (SEG0A, SEG0B, SEG0C, SEG0D, SEG0E, SEG0F, SEG0G, DEC0P)
io_segs_1 (SEG1A, SEG1B, SEG1C, SEG1D, SEG1E, SEG1F, SEG1G, DEC1P) io_segs_1 (SEG1A, SEG1B, SEG1C, SEG1D, SEG1E, SEG1F, SEG1G, DEC1P)
io_segs_2 (SEG2A, SEG2B, SEG2C, SEG2D, SEG2E, SEG2F, SEG2G, DEC2P) io_segs_2 (SEG2A, SEG2B, SEG2C, SEG2D, SEG2E, SEG2F, SEG2G, DEC2P)

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@ -1,7 +1,7 @@
package npc.keyboard package npc.keyboard
import chisel3._ import chisel3._
import chisel3.util.{Counter, Decoupled, Queue, Reverse, MuxLookup} import chisel3.util.{Counter, Decoupled, Queue, Reverse, MuxLookup, RegEnable}
import npc.seg._ import npc.seg._
import upickle.implicits.key import upickle.implicits.key
@ -62,11 +62,15 @@ class SegGenerator(seg_count: Int) extends Module {
val keycode = Flipped(Decoupled(UInt(8.W))) val keycode = Flipped(Decoupled(UInt(8.W)))
val segs = Output(Vec(seg_count, UInt(8.W))) val segs = Output(Vec(seg_count, UInt(8.W)))
}) })
io.keycode.ready := DontCare val counter = Counter(0xFF)
io.keycode.ready := false.B
when(io.keycode.valid) {
io.keycode.ready := true.B
}
val seg_regs = RegInit(VecInit(Seq.fill(seg_count)(0.U(8.W)))) val seg_regs = RegInit(VecInit(Seq.fill(seg_count)(0.U(8.W))))
val last_keycode = RegInit(0.U(8.W)) val last_keycode = RegInit(0.U(8.W))
val (counter, _) = Counter(0 to 0xFF, clock.asBool, reset.asBool)
val digit_to_seg = ((0 until 16).map(_.U)).zip(Seq( val digit_to_seg = ((0 until 16).map(_.U)).zip(Seq(
"b00000011".U, "b10011111".U, "b00100101".U, "b00001101".U, "b00000011".U, "b10011111".U, "b00100101".U, "b00001101".U,
"b10011001".U, "b01001001".U, "b01000001".U, "b00011111".U, "b10011001".U, "b01001001".U, "b01000001".U, "b00011111".U,
@ -83,13 +87,14 @@ class SegGenerator(seg_count: Int) extends Module {
0x25.U, 0x2E.U, 0x36.U, 0x3D.U, 0x3E.U, 0x46.U, 0x25.U, 0x2E.U, 0x36.U, 0x3D.U, 0x3E.U, 0x46.U,
)) ))
val keycode = io.keycode.bits // val keycode = Mux(io.keycode.ready && io.keycode.valid, io.keycode.bits, keycode)
val keycode = RegEnable(io.keycode.bits, 0.U, io.keycode.ready && io.keycode.valid)
val keycode_digits = VecInit(keycode(3,0)) ++ VecInit(keycode(7,4)) val keycode_digits = VecInit(keycode(3,0)) ++ VecInit(keycode(7,4))
val keycode_seg = keycode_digits.map(MuxLookup(_, 0xFF.U)(digit_to_seg)) val keycode_seg = keycode_digits.map(MuxLookup(_, 0xFF.U)(digit_to_seg))
val ascii = MuxLookup(keycode, 0.U)(keycode_to_ascii) val ascii = MuxLookup(keycode, 0.U)(keycode_to_ascii)
val ascii_digits = VecInit(ascii(3,0)) ++ VecInit(ascii(6,4)) val ascii_digits = VecInit(ascii(3,0)) ++ VecInit(ascii(6,4))
val ascii_seg = ascii_digits.map(MuxLookup(_, 0xFF.U)(digit_to_seg)) val ascii_seg = ascii_digits.map(MuxLookup(_, 0xFF.U)(digit_to_seg))
val count_digits = VecInit(counter(3,0)) ++ VecInit(counter(7,4)) val count_digits = VecInit(counter.value(3,0)) ++ VecInit(counter.value(7,4))
val count_seg = count_digits.map(MuxLookup(_, 0xFF.U)(digit_to_seg)) val count_seg = count_digits.map(MuxLookup(_, 0xFF.U)(digit_to_seg))
seg_regs := keycode_seg ++ ascii_seg ++ count_seg ++ Seq(0xFF.U, 0xFF.U) seg_regs := keycode_seg ++ ascii_seg ++ count_seg ++ Seq(0xFF.U, 0xFF.U)

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@ -88,7 +88,7 @@ class Keyboard extends Module {
val segs = Output(Vec(3, UInt(8.W))) val segs = Output(Vec(3, UInt(8.W)))
}) })
val seg_handler = Module(new SegHandler) val seg_handler = Module(new SegGenerator(seg_count = 8))
val keyboard_controller = Module(new KeyboardController) val keyboard_controller = Module(new KeyboardController)
seg_handler.io.keycode <> keyboard_controller.io.out seg_handler.io.keycode <> keyboard_controller.io.out

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@ -45,9 +45,9 @@ int main(int argc, char **argv, char **env) {
while (true) { while (true) {
nvboard_update(); nvboard_update();
cycle(top, [&] { cycle(top, [&] {
if (keycode != top->io_keycode_bits) { if (keycode != top->io_ps2_data) {
printf("keycode: 0x%x display: %x %x\n", top->io_keycode_bits, top->io_segs_1, top->io_segs_0); keycode = top->io_ps2_data;
keycode = top->io_keycode_bits; printf("%d\n", keycode);
} }
}); });
} }