> configure(npc)

ysyx_22040000 李心杨
 Linux calcite 6.6.19 #1-NixOS SMP PREEMPT_DYNAMIC Fri Mar  1 12:35:11 UTC 2024 x86_64 GNU/Linux
  18:17:51  up   3:37,  2 users,  load average: 1.58, 0.74, 0.51

npc/CMakeLists.txt

@@ -1,7 +1,6 @@
 cmake_minimum_required(VERSION 3.20)
 
 project(npc)
-include(CTest)
 set (CMAKE_CXX_STANDARD 11)
 cmake_policy(SET CMP0144 NEW)
 
@@ -84,15 +83,7 @@ foreach(TOPMODULE IN LISTS TOPMODULES)
   add_dependencies(V${TOPMODULE} ChiselBuild_${TOPMODULE})
 
   enable_testing()
-  add_test(V${TOPMODULE}_build
-    "${CMAKE_COMMAND}"
-    --build "${CMAKE_BINARY_DIR}"
-    --config "$<CONFIG>"
-    --target V${TOPMODULE}
-  )
-  set_tests_properties(V${TOPMODULE}_build PROPERTIES FIXTURES_SETUP V${TOPMODULE}_fixture)
-  add_test(V${TOPMODULE} V${TOPMODULE})
-  set_tests_properties(V${TOPMODULE} PROPERTIES FIXTURES_REQUIRED V${TOPMODULE}_fixture)
+  add_test(NAME V${TOPMODULE} COMMAND V${TOPMODULE})
 
   # -- Add build tracking
   add_custom_command(

npc/core/src/main/scala/Main.scala

@@ -2,8 +2,10 @@ package npc
 
 import chisel3._
 import chisel3.util.{MuxLookup, Fill, Decoupled, Counter, Queue, Reverse}
+import chisel3.util.{SRAM}
 import chisel3.stage.ChiselOption
-import npc.util.KeyboardSegController
+import npc.util.{ KeyboardSegController, RegisterFile }
+import flowpc.components.ProgramCounter
 
 class Switch extends Module {
   val io = IO(new Bundle {
@@ -30,3 +32,9 @@ class Keyboard extends Module {
   keyboard_controller.io.ps2 := io.ps2
   io.segs := seg_handler.io.segs
 }
+
+class Flowpc extends Module {
+  val io = IO(new Bundle { })
+  val register_file = new RegisterFile(readPorts = 2);
+  val pc = new ProgramCounter(32);
+}

npc/core/src/main/scala/ProgramCounter.scala

@@ -0,0 +1,11 @@
+package flowpc.components
+import chisel3._
+import chisel3.util.{Valid}
+
+class ProgramCounter (width: Int) extends Module {
+  val io = new Bundle {
+    val next_pc = Input(Flipped(Valid(UInt(width.W))))
+    val pc = Output(UInt(width.W))
+  }
+    io.pc := Mux(io.next_pc.valid, io.next_pc.bits, io.pc)
+}

npc/core/src/main/scala/RegisterFile.scala

@@ -2,7 +2,7 @@ package npc.util
 
 import chisel3._
 
-class RegisterFile(readPorts: Int = 1) extends Module {
+class RegisterFile(readPorts: Int) extends Module {
   require(readPorts >= 0)
   val io = IO(new Bundle {
     val writeEnable = Input(Bool())

npc/flake.nix

@@ -19,8 +19,6 @@
           packages = [
             clang-tools
             rnix-lsp
-            coursier
-            metals
 
             gdb
             jre