From 08638dad894f3a8c831a4a97326968bbe5aa81a7 Mon Sep 17 00:00:00 2001 From: tracer-ysyx Date: Wed, 13 Mar 2024 10:26:27 +0800 Subject: [PATCH] =?UTF-8?q?>=20configure(npc)=20=20ysyx=5F22040000=20?= =?UTF-8?q?=E6=9D=8E=E5=BF=83=E6=9D=A8=20=20Linux=20calcite=206.6.19=20#1-?= =?UTF-8?q?NixOS=20SMP=20PREEMPT=5FDYNAMIC=20Fri=20Mar=20=201=2012:35:11?= =?UTF-8?q?=20UTC=202024=20x86=5F64=20GNU/Linux=20=20=2010:26:27=20=20up?= =?UTF-8?q?=20=20=200:02,=20=202=20users,=20=20load=20average:=202.48,=201?= =?UTF-8?q?.43,=200.57?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- npc/core/src/main/scala/RegisterFile.scala | 1 + 1 file changed, 1 insertion(+) diff --git a/npc/core/src/main/scala/RegisterFile.scala b/npc/core/src/main/scala/RegisterFile.scala index 00bf529..509ceaa 100644 --- a/npc/core/src/main/scala/RegisterFile.scala +++ b/npc/core/src/main/scala/RegisterFile.scala @@ -66,6 +66,7 @@ class RegisterFileCore[T <: Data](size: Int, tpe: T, numReadPorts: Int) extends for (readPort <- readPorts) { readPort.data := regFile(readPort.addr) } + dontTouch(regFile) } object RegisterFile {