60 lines
1.8 KiB
C
60 lines
1.8 KiB
C
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/***************************************************************************************
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* Copyright (c) 2014-2022 Zihao Yu, Nanjing University
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*
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* NEMU is licensed under Mulan PSL v2.
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* You can use this software according to the terms and conditions of the Mulan PSL v2.
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* You may obtain a copy of Mulan PSL v2 at:
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* http://license.coscl.org.cn/MulanPSL2
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*
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* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
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* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
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* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
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*
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* See the Mulan PSL v2 for more details.
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***************************************************************************************/
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#ifndef __ISA_H__
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#define __ISA_H__
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#if defined(CONFIG_ISA_mips32)
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#define ISA_QEMU_BIN "qemu-system-mipsel"
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#define ISA_QEMU_ARGS "-machine", "mipssim",\
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"-kernel", NEMU_HOME "/resource/mips-elf/mips.dummy",
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#elif defined(CONFIG_ISA_riscv) && !defined(CONFIG_RV64)
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#define ISA_QEMU_BIN "qemu-system-riscv32"
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#define ISA_QEMU_ARGS "-bios", "none",
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#elif defined(CONFIG_ISA_riscv) && defined(CONFIG_RV64)
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#define ISA_QEMU_BIN "qemu-system-riscv64"
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#define ISA_QEMU_ARGS
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#elif defined(CONFIG_ISA_x86)
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#define ISA_QEMU_BIN "qemu-system-i386"
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#define ISA_QEMU_ARGS
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#else
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#error Unsupport ISA
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#endif
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union isa_gdb_regs {
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struct {
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#if defined(CONFIG_ISA_mips32)
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uint32_t gpr[32];
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uint32_t status, lo, hi, badvaddr, cause, pc;
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#elif defined(CONFIG_ISA_riscv) && !defined(CONFIG_RV64)
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uint32_t gpr[32];
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uint32_t pc;
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#elif defined(CONFIG_ISA_riscv) && defined(CONFIG_RV64)
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uint64_t gpr[32];
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uint64_t fpr[32];
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uint64_t pc;
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#elif defined(CONFIG_ISA_x86)
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uint32_t eax, ecx, edx, ebx, esp, ebp, esi, edi;
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uint32_t eip, eflags;
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uint32_t cs, ss, ds, es, fs, gs;
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#endif
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};
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struct {
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uint32_t array[77];
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};
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};
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#endif
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